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Synergy: A HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC

arXiv 1804.00706 ↗First posted 28 Mar 2018cs.DC cs.AR cs.LGcited by 4

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Abstract (arXiv)

Convolutional Neural Networks (CNN) have been widely deployed in diverse application domains. There has been significant progress in accelerating both their training and inference using high-performance GPUs, FPGAs, and custom ASICs for datacenter-scale environments. The recent proliferation of mobile and IoT devices have necessitated real-time, energy-efficient deep neural network inference on embedded-class, resource-constrained platforms. In this context, we present em Synergy, an automated, hardware-software co-designed, pipelined, high-throughput CNN inference framework on embedded heterogeneous system-on-chip (SoC) architectures (Xilinx Zynq). em Synergy leverages, through multi-threading, all the available on-chip resources, which includes the dual-core ARM processor along with the FPGA and the NEON SIMD engines as accelerators. Moreover, em Synergy provides a unified abstraction of the heterogeneous accelerators (FPGA and NEON) and can adapt to different network configurations at runtime without changing the underlying hardware accelerator architecture by balancing workload across accelerators through work-stealing. em Synergy achieves 7.3X speedup, averaged across seven CNN models, over a well-optimized software-only solution. em Synergy demonstrates substantially better throughput and energy-efficiency compared to the contemporary CNN implementations on the same SoC architecture.

Key facts. Cited by 4 papers in the map (data through 13 Oct 2026). First posted on arXiv 28 Mar 2018.

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Citing papers per year: 2021: 2; 2022: 0; 2023: 0; 2024: 0; 2025: 1; 2026: 1.

4 papers.