mlsanityData to 14 Oct 2026

A CMOS Spiking Neuron for Brain-Inspired Neural Networks with Resistive Synapses and In-Situ Learning

arXiv 1505.07814 ↗First posted 28 May 2015cs.NEcited by 5

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Abstract (arXiv)

Nanoscale resistive memories are expected to fuel dense integration of electronic synapses for large-scale neuromorphic system. To realize such a brain-inspired computing chip, a compact CMOS spiking neuron that performs in-situ learning and computing while driving a large number of resistive synapses is desired. This work presents a novel leaky integrate-and-fire neuron design which implements the dual-mode operation of current integration and synaptic drive, with a single opamp and enables in-situ learning with crossbar resistive synapses. The proposed design was implemented in a 0.18 μm CMOS technology. Measurements show neuron's ability to drive a thousand resistive synapses, and demonstrate an in-situ associative learning. The neuron circuit occupies a small area of 0.01 mm2 and has an energy-efficiency of 9.3 pJ/spike/synapse.

Key facts. Cited by 5 papers in the map (data through 14 Oct 2026). First posted on arXiv 28 May 2015.

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Citing papers per year: 2021: 1; 2022: 0; 2023: 2; 2024: 0; 2025: 1; 2026: 1.

5 papers.