# MQSS-Selector: RL-Guided Pass Selection for an MLIR Compilation Pipeline

arXiv: https://arxiv.org/abs/2609.30104 · HTML: https://mlsanity.com/paper/2609.30104/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 6 of its 30 references that are in the map.
- First posted on arXiv 24 Sep 2026.

## Builds on (most cited first, 6 of 6)

- [MLIR: A Compiler Infrastructure for the End of Moore's Law](https://mlsanity.com/paper/2002.11054/) (2020)
- [MLGO: a Machine Learning Guided Compiler Optimizations Framework](https://mlsanity.com/paper/2101.04808/) (2021)
- [SupermarQ: A Scalable Quantum Benchmark Suite](https://mlsanity.com/paper/2202.11045/) (2022)
- [Enabling Dataflow Optimization for Quantum Programs](https://mlsanity.com/paper/2101.11030/) (2021)
- [Beyond the Phase Ordering Problem: Finding the Globally Optimal Code w.r.t. Optimization Phases](https://mlsanity.com/paper/2410.03120/) (2024)
- [Quantum resources in resource management systems](https://mlsanity.com/paper/2506.10052/) (2025)

## Abstract (arXiv)

High Performance Computing (HPC) and Quantum Computing (QC) systems are increasingly converging towards unified High Performance Computing-Quantum Computing (HPCQC) infrastructures, driven by a growing need to bridge classical and quantum workflows, which affects all levels of the system stack, from the hardware to compilers and runtimes, all the way to applications. However, today's QC devices are still in the Noisy Intermediate-Scale Quantum (NISQ) era, are error-prone and resource-limited, and therefore require specialized optimizations and topology mappings to achieve sufficient fidelity. This places special emphasis on proper compilation and optimization within the overall quantum software stack. Many existing stacks remain fragmented, with separate components responsible for device selection, compiler-pass optimization, and job queue scheduling. This paper proposes a unified, learning-based selector that integrates these disparate stages into a cohesive framework. Our proposed selector scheme leverages reinforcement learning and deep learning models that can be extended to simultaneously optimize multiple objectives -- such as fidelity, compilation time, and scheduling latency -- while dynamically adapting to circuit characteristics and device conditions.