# Composable CXL Memory as a Kubernetes-Native Shared Memory for LLM Serving

arXiv: https://arxiv.org/abs/2609.10790 · HTML: https://mlsanity.com/paper/2609.10790/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 14 of its 38 references that are in the map.
- First posted on arXiv 9 Sep 2026.

## Builds on (most cited first, 14 of 14)

- [Efficient Memory Management for Large Language Model Serving with PagedAttention](https://mlsanity.com/paper/2309.06180/) (2023)
- [Qwen2.5 Technical Report](https://mlsanity.com/paper/2412.15115/) (2024)
- [SGLang: Efficient Execution of Structured Language Model Programs](https://mlsanity.com/paper/2312.07104/) (2023)
- [DistServe: Disaggregating Prefill and Decoding for Goodput-optimized Large Language Model Serving](https://mlsanity.com/paper/2401.09670/) (2024)
- [Splitwise: Efficient generative LLM inference using phase splitting](https://mlsanity.com/paper/2311.18677/) (2023)
- [CacheBlend: Fast Large Language Model Serving for RAG with Cached Knowledge Fusion](https://mlsanity.com/paper/2405.16444/) (2024)
- [LMCache: An Efficient KV Cache Layer for Enterprise-Scale LLM Inference](https://mlsanity.com/paper/2510.09665/) (2025)
- [TraCT: Disaggregated LLM Serving with CXL Shared Memory KV Cache at Rack-Scale](https://mlsanity.com/paper/2512.18194/) (2025)
- [TPP: Transparent Page Placement for CXL-Enabled Tiered-Memory](https://mlsanity.com/paper/2206.02878/) (2022)
- [A Survey of LLM Inference Systems](https://mlsanity.com/paper/2506.21901/) (2025)
- [Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices](https://mlsanity.com/paper/2303.15375/) (2023)
- [Octopus: Enhancing CXL Memory Pods via Sparse Topology](https://mlsanity.com/paper/2501.09020/) (2025)
- [SAC: Disaggregated KV Cache System for Sparse Attention LLMs with CXL](https://mlsanity.com/paper/2606.19746/) (2026)
- [The Hitchhiker's Guide to Programming and Optimizing Cache Coherent Heterogeneous Systems: CXL, NVLink-C2C, and AMD Infinity Fabric](https://mlsanity.com/paper/2411.02814/) (2024)

## Abstract (arXiv)

We present a Kubernetes Dynamic Resource Allocation (DRA) driver that makes composable CXL memory a schedulable cluster resource, and evaluate the resulting shared-memory tier for cross-node KV-cache reuse in LLM serving. The driver composes CXL regions on demand, materializes them as DAX devices on each participating host, and injects them into pods under a single Container Device Interface (CDI) name so that pods on different nodes access the same physical region. A shared-memory connector for vLLM/llm-d uses that region as a KV-cache tier with a slot directory embedded inside the shared medium, which eliminates the need for an external metadata service. On a two-node cluster with a 512,GiB CXL appliance and Qwen2.5-7B-Instruct, cross-node prefix reuse reduces TTFT by 5.5×--36.6× at an external hit rate of 95.4--99.5,%, while node-local tiers (GPU prefix caching, CPU-DRAM offload) fall back to full recompute. The sharing gap, defined as the latency ratio between cross-node and same-node reuse, is 1--4%, indicating that cross-node reuse incurs little additional latency relative to same-node reuse on our testbed. Both replicas run full engines; the study demonstrates memory disaggregation rather than prefill/decode disaggregation. We report this as a feasibility study rather than a performance evaluation.