# Fidelity-Aware Scheduling of Quantum Circuits on Multi-QPU Systems

arXiv: https://arxiv.org/abs/2609.09980 · HTML: https://mlsanity.com/paper/2609.09980/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 10 of its 26 references that are in the map.
- First posted on arXiv 9 Sep 2026.

## Builds on (most cited first, 10 of 10)

- [Inductive Representation Learning on Large Graphs](https://mlsanity.com/paper/1706.02216/) (2017)
- [Optuna: A Next-generation Hyperparameter Optimization Framework](https://mlsanity.com/paper/1907.10902/) (2019)
- [Enabling Multi-programming Mechanism for Quantum Computing in the NISQ Era](https://mlsanity.com/paper/2102.05321/) (2021)
- [Qubit Mapping and Routing via MaxSAT](https://mlsanity.com/paper/2208.13679/) (2022)
- [Adaptive job and resource management for the growing quantum cloud](https://mlsanity.com/paper/2203.13260/) (2022)
- [Integrating Quantum Computing Resources into Scientific HPC Ecosystems](https://mlsanity.com/paper/2408.16159/) (2024)
- [Graph Neural Network-Based Predictor for Optimal Quantum Hardware Selection](https://mlsanity.com/paper/2507.19093/) (2025)
- [Robust Qubit Mapping Algorithm via Double-Source Optimal Routing on Large Quantum Circuits](https://mlsanity.com/paper/2210.01306/) (2022)
- [Q-fid: Quantum Circuit Fidelity Improvement with LSTM Networks](https://mlsanity.com/paper/2303.17523/) (2023)
- [Distributed Quantum Circuit Cutting for Hybrid Quantum-Classical High-Performance Computing](https://mlsanity.com/paper/2505.01184/) (2025)

## Abstract (arXiv)

High Performance Computing-Quantum Computing (HPCQC) platforms expose multiple Quantum Processing Units (QPUs) that may differ in size, topology, native gates, and noise characteristics. For current noisy devices, errors compound along the compiled circuits quickly, and minimizing them, that is, maximizing the circuits' execution fidelity, is essential for reliable results. Fidelity depends on the compilation to a specific target device: the same high-level circuit may produce different executables and, therefore, different expected fidelities across QPUs. We present a low-overhead fidelity-aware scheduling framework for multi-QPU systems based on a Graph Neural Network (GNN) that estimates, before compilation, the expected fidelity of each circuit on each available QPU. Then, a tunable scheduler uses these estimates to control the trade-off between execution fidelity and parallelism. Results show that this framework allows for approximating an exhaustive fidelity-based assignment, saving computational resources compared to a brute-force approach that compiles each circuit on every device.