# Syn2Logic: End-to-End Neuromorphic Design Automation

arXiv: https://arxiv.org/abs/2608.25536 · HTML: https://mlsanity.com/paper/2608.25536/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 20 of its 86 references that are in the map.
- First posted on arXiv 26 Aug 2026.

## Builds on (most cited first, 20 of 20)

- [Training Spiking Neural Networks Using Lessons From Deep Learning](https://mlsanity.com/paper/2109.12894/) (2021)
- [SpikingJelly: An open-source machine learning infrastructure platform for spike-based intelligence](https://mlsanity.com/paper/2310.16620/) (2023)
- [A Survey of Neuromorphic Computing and Neural Networks in Hardware](https://mlsanity.com/paper/1705.06963/) (2017)
- [The BrainScaleS-2 accelerated neuromorphic system with hybrid plasticity](https://mlsanity.com/paper/2201.11063/) (2022)
- [Neuromorphic Intermediate Representation: A Unified Instruction Set for Interoperable Brain-Inspired Computing](https://mlsanity.com/paper/2311.14641/) (2023)
- [Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge](https://mlsanity.com/paper/2401.01141/) (2024)
- [The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing](https://mlsanity.com/paper/2103.08392/) (2021)
- [E3NE: An End-to-End Framework for Accelerating Spiking Neural Networks with Emerging Neural Encoding on FPGAs](https://mlsanity.com/paper/2111.10027/) (2021)
- [A Fully-Configurable Open-Source Software-Defined Digital Quantized Spiking Neural Core Architecture](https://mlsanity.com/paper/2404.02248/) (2024)
- [FireFly v2: Advancing Hardware Support for High-Performance Spiking Neural Network with a Spatiotemporal FPGA Accelerator](https://mlsanity.com/paper/2309.16158/) (2023)
- [The OPS-SAT benchmark for detecting anomalies in satellite telemetry](https://mlsanity.com/paper/2407.04730/) (2024)
- [Composing Neural Algorithms with Fugu](https://mlsanity.com/paper/1905.12130/) (2019)
- [RANC: Reconfigurable Architecture for Neuromorphic Computing](https://mlsanity.com/paper/2011.00624/) (2020)
- [Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks](https://mlsanity.com/paper/2203.12437/) (2022)
- [DeepFire2: A Convolutional Spiking Neural Network Accelerator on FPGAs](https://mlsanity.com/paper/2305.05187/) (2023)
- [A Quarter of a Century of Neuromorphic Architectures on FPGAs -- an Overview](https://mlsanity.com/paper/2502.20415/) (2025)
- [IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons](https://mlsanity.com/paper/2508.12846/) (2025)
- [Neuromorphic Simulation of Drosophila Melanogaster Brain Connectome on Loihi 2](https://mlsanity.com/paper/2508.16792/) (2025)
- [Dynamic Heuristic Neuromorphic Solver for the Edge User Allocation Problem with Bayesian Confidence Propagation Neural Network](https://mlsanity.com/paper/2602.01294/) (2026)
- [Spiking Neural Network inference on FPGAs with hls4ml](https://mlsanity.com/paper/2606.10008/) (2026)

## Abstract (arXiv)

In this work, we propose a view on electronic Neuromorphic Design Automation (eNDA), which we see as a design automation flow that bridges computational neuroscience modeling with traditional Electronic Design Automation (EDA) flow. We introduce the term, give examples of how it can be implemented, and design a prototype implementation: Syn2Logic. Syn2Logic is an entire eNDA framework, that allows neuroscientists to model neural behavior using a custom DSL and a compiler that takes the same model description down to synthesizable RTL hardware. We end the paper by applying the eNDA-flow through Syn2Logic to show how to -- without writing a single line of hardware description language (HDL) code-- (i) generate what we believe is the fastest C. elegans accelerator that runs significantly faster than state-of-the-art simulators, (ii) create (to the best of our knowledge) the fastest, most generic neuromorphic sudoku solver that outperforms CP-SAT and SCIP on TOP1465 puzzles, (iii) create a 5.6 million FPS/Watt accelerator on a tiny FPGA that outperforms existing neuromorphic architectures in terms of speed and energy-efficiency on the MNIST dataset, and (iv) create a generic accelerator for unsupervised learning that outperforms most existing unsupervised methods on the OPS-SAT benchmark.