# Meganeura: Portable GPU Training and Inference through Vulkan and Metal

arXiv: https://arxiv.org/abs/2608.01563 · HTML: https://mlsanity.com/paper/2608.01563/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 19 of its 27 references that are in the map.
- First posted on arXiv 3 Aug 2026.

## Builds on (most cited first, 19 of 19)

- [Deep Residual Learning for Image Recognition](https://mlsanity.com/paper/1512.03385/) (2015)
- [PyTorch: An Imperative Style, High-Performance Deep Learning Library](https://mlsanity.com/paper/1912.01703/) (2019)
- [High-Resolution Image Synthesis with Latent Diffusion Models](https://mlsanity.com/paper/2112.10752/) (2021)
- [Robust Speech Recognition via Large-Scale Weak Supervision](https://mlsanity.com/paper/2212.04356/) (2022)
- [DINOv3](https://mlsanity.com/paper/2508.10104/) (2025)
- [SmolVLA: A Vision-Language-Action Model for Affordable and Efficient Robotics](https://mlsanity.com/paper/2506.01844/) (2025)
- [On-Device Training Under 256KB Memory](https://mlsanity.com/paper/2206.15472/) (2022)
- [Glow: Graph Lowering Compiler Techniques for Neural Networks](https://mlsanity.com/paper/1805.00907/) (2018)
- [TensorFlow.js: Machine Learning for the Web and Beyond](https://mlsanity.com/paper/1901.05350/) (2019)
- [Equality Saturation for Tensor Graph Superoptimization](https://mlsanity.com/paper/2101.01332/) (2021)
- [WebLLM: A High-Performance In-Browser LLM Inference Engine](https://mlsanity.com/paper/2412.15803/) (2024)
- [TinyIREE: An ML Execution Environment for Embedded Systems from Compilation to Deployment](https://mlsanity.com/paper/2205.14479/) (2022)
- [Pure Tensor Program Rewriting via Access Patterns (Representation Pearl)](https://mlsanity.com/paper/2105.09377/) (2021)
- [ExecuTorch -- A Unified PyTorch Solution to Run AI Models On-Device](https://mlsanity.com/paper/2605.08195/) (2026)
- [Better Together: Unifying Datalog and Equality Saturation](https://mlsanity.com/paper/2304.04332/) (2023)
- [Characterizing WebGPU Dispatch Overhead for LLM Inference Across Four GPU Vendors, Three Backends, and Three Browsers](https://mlsanity.com/paper/2604.02344/) (2026)
- [Llamas on the Web: Memory-Efficient, Performance-Portable, and Multi-Precision LLM Inference with WebGPU](https://mlsanity.com/paper/2605.20706/) (2026)
- [RAF: Holistic Compilation for Deep Learning Model Training](https://mlsanity.com/paper/2303.04759/) (2023)
- [Global Pass Barriers Without Per-Resource RHI Tracking: A Cross-Vendor Study with Blade](https://mlsanity.com/paper/2607.26506/) (2026)

## Abstract (arXiv)

Training and deployed inference often cross export, conversion, and platform-specific runtime boundaries. Meganeura asks whether one compact native compiler can span both phases on consumer GPUs. Its typed static graph, automatic differentiation, optimizer, checkpoint, memory planner, and runtime lower specialized programs through Vulkan and Metal. We compare five matched workloads with PyTorch on NVIDIA and AMD discrete GPUs, an AMD APU, Apple silicon, and an Intel iGPU. The protocol separates strict f32 from validated fast paths and gates forward and backward independently. Forty-eight of 50 device-workload-mode cells pass both gates; the other two share one unresolved backward-reference disagreement on a newly supported APU. In strict f32, Meganeura wins 12 of 20 GPU-referenced minimal-latency cells and has a median valid training gap of 1.8x. On the discrete AMD GPU, four of five inference workloads are within 1.10x of compiled ROCm PyTorch and three training workloads are faster. Under accelerated contracts, the worst training gap is 4.6x. Compilation takes 0.1-2.4 seconds versus 6-96 seconds for torch.compile on supported GPU paths; the stripped binary is 13 MiB. Dispatch profiles localize the largest gaps to convolution derivatives and attention backward. A physical Android XR case study transfers a Meganeura-trained decoder into an Adreno/OpenXR application sharing the graphics queue. The results show that general consumer graphics APIs can support a compact shared train-to-deploy stack at useful, sometimes vendor-competitive performance. The measured gaps point to kernel coverage, scheduling, and arithmetic policy rather than an identified API limitation.