# FP8 is All You Need (Part 2): Full-FP64 3-D FFT on FP8-Generation Tensor CoresThe Integer-Epilogue Wall and the Minimal Hardware That Would Remove It

arXiv: https://arxiv.org/abs/2606.23698 · HTML: https://mlsanity.com/paper/2606.23698/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 3 of its 35 references that are in the map.
- First posted on arXiv 28 May 2026.

## Builds on (most cited first, 3 of 3)

- [Guaranteed DGEMM Accuracy While Using Reduced Precision Tensor Cores Through Extensions of the Ozaki Scheme](https://mlsanity.com/paper/2511.13778/) (2025)
- [Emulation of Complex Matrix Multiplication based on the Chinese Remainder Theorem](https://mlsanity.com/paper/2512.08321/) (2025)
- [Double-Precision Matrix Multiplication Emulation via Ozaki-II Scheme with FP8 Quantization](https://mlsanity.com/paper/2603.10634/) (2026)

## Abstract (arXiv)

The NVIDIA Blackwell Ultra (B300) GPU cuts FP64 vector throughput ~ 30× while multiplying FP8 tensor throughput. After the recovery of FP64 GEMM via Ozaki Scheme II on FP8 tensor cores and the Tensor-Memory Equilibrium model of the companions ("FP8 is All You Need, Part 1" and "Ozaki 2.5") we ask whether the fifth canonical HPC primitive, the full-FP64 10243 3-D FFT, can be carried by the same substrate, and answer with a design and its limit. It is a Bailey six-step transform with no FP64 arithmetic: FP8-tensor DFT GEMMs with fused twiddles, residue-domain Karatsuba combines and exact CRT reconstruction whose bulk is a small GEMM on the FP16 tensor path and whose remainder is a Kulisch fixed-point accumulation with a two-sided modulo-M lift, so the only rounding is the final conversion; constants are machine-generated and verified bit-exactly. The central finding: the binding resource is not floating point but a per-output integer epilogue with floor (crm epi/8),Brm mem, crm epi ≈ 203-281 instructions per output: on B300 it holds the transform at 63-87 ms against a 12.9 ms roof (4.9-6.7× short); at most 1.3-1.9× faster than the collapsed native path, possibly no faster at realised issue rates; no software route reaches the roof; on the NVIDIA Rubin GPU emulation loses 8-11×. An FP32 variant meets the same wall: the cause is per-scalar reconstruction, not FP64. Each floor term names its remedy: the NVIDIA B200 GPU's INT8 tensor core restored with a position-weighted cross-column accumulation primitive, a load-path deconstruction datapath shared with the companions, two ISA idioms and modular reduction at the MMA output give 16.0-23.5 ms with minor hardware and 12.9-15.0 ms with one moderate ask. All figures are projected floors, not measurements, with sensitivities and the FP8 layout condition given.