# Long-Term and Short-Term Transistor Aging in Deep Neural Networks: Impact and Mitigation

arXiv: https://arxiv.org/abs/2606.04266 · HTML: https://mlsanity.com/paper/2606.04266/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 12 of its 50 references that are in the map.
- First posted on arXiv 2 Jun 2026.

## Builds on (most cited first, 12 of 12)

- [Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Coding](https://mlsanity.com/paper/1510.00149/) (2015)
- [Efficient Processing of Deep Neural Networks: A Tutorial and Survey](https://mlsanity.com/paper/1703.09039/) (2017)
- [EIE: Efficient Inference Engine on Compressed Deep Neural Network](https://mlsanity.com/paper/1602.01528/) (2016)
- [Adding Gradient Noise Improves Learning for Very Deep Networks](https://mlsanity.com/paper/1511.06807/) (2015)
- [Terminal Brain Damage: Exposing the Graceless Degradation in Deep Neural Networks Under Hardware Fault Attacks](https://mlsanity.com/paper/1906.01017/) (2019)
- [Analyzing and Mitigating the Impact of Permanent Faults on a Systolic Array Based Neural Network Accelerator](https://mlsanity.com/paper/1802.04657/) (2018)
- [Hardware-oriented Approximation of Convolutional Neural Networks](https://mlsanity.com/paper/1604.03168/) (2016)
- [On the Resilience of RTL NN Accelerators: Fault Characterization and Mitigation](https://mlsanity.com/paper/1806.09679/) (2018)
- [Training Modern Deep Neural Networks for Memory-Fault Robustness](https://mlsanity.com/paper/1911.10287/) (2019)
- [A 0.3-2.6 TOPS/W Precision-Scalable Processor for Real-Time Large-Scale ConvNets](https://mlsanity.com/paper/1606.05094/) (2016)
- [Reliability-Aware Quantization for Anti-Aging NPUs](https://mlsanity.com/paper/2103.04812/) (2021)
- [Hardware Trojan Detection Using Controlled Circuit Aging](https://mlsanity.com/paper/2004.02997/) (2020)

## Abstract (arXiv)

Deep neural networks (DNNs) are used in a variety of real-world applications including, for example, image classification and speech recognition. The inference accuracy of DNN implemented on hardware in integrated circuits (ICs) degrades under phenomena such as transistor aging. Aging slows down the switching speed of transistors, resulting in system-level timing violations due to unsustainable clocks. To maintain reliability for the entire projected lifetime, designers add guardbands to prevent timing violations; however, adding large timing guardbands causes losses in performance (speed or throughput). This chapter provides a detailed discussion of the effects of long-term and short-term transistor aging on DNN inference accuracy. Furthermore, to mitigate aging effects on DNN's accuracy and keep them at bay, a methodology for aging-aware retraining is presented in order to generate a resilient DNN even when aggressive (i.e., smaller than required) guardbands are used. This improves the inference accuracy of the DNNs even in the presence of aging-induced degradation. These effects are discussed in this chapter along with mitigation strategies on a hardware implementation of a DNN for image classification on an off-the-shelf image dataset. The application of short-term aging as an excitation mechanism for the detection of hardware Trojans in integrated circuits is also briefly discussed.