# RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification

arXiv: https://arxiv.org/abs/2604.17391 · HTML: https://mlsanity.com/paper/2604.17391/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 6 of its 27 references that are in the map.
- First posted on arXiv 19 Apr 2026.

## Builds on (most cited first, 6 of 6)

- [An Analysis of ISO 26262: Using Machine Learning Safely in Automotive Software](https://mlsanity.com/paper/1709.02435/) (2017)
- [Ergo, SMIRK is Safe: A Safety Case for a Machine Learning Component in a Pedestrian Automatic Emergency Brake System](https://mlsanity.com/paper/2204.07874/) (2022)
- [Using Machine Learning Safely in Automotive Software: An Assessment and Adaption of Software Process Requirements in ISO 26262](https://mlsanity.com/paper/1808.01614/) (2018)
- [Key Safety Design Overview in AI-driven Autonomous Vehicles](https://mlsanity.com/paper/2412.08862/) (2024)
- [Towards a RISC-V Open Platform for Next-generation Automotive ECUs](https://mlsanity.com/paper/2307.04148/) (2023)
- [On the Application of ISO 26262 in Control Design for Automated Vehicles](https://mlsanity.com/paper/1804.04349/) (2018)

## Built on by (most cited first, 1 of 1)

- [GenAI-Driven Approach to RISC-V Supply Chain Exploration](https://mlsanity.com/paper/2605.15223/) (2026)

## Abstract (arXiv)

RISC-V is emerging as a viable platform for automotive-grade embedded computing, with recent ISO 26262 ASIL-D certifications demonstrating readiness for safety-critical deployment in autonomous driving systems. However, functional safety in automotive systems is fundamentally a certification problem rather than a processor problem. The dominant costs arise from diagnostic coverage analysis, toolchain qualification, fault injection campaigns, safety-case generation, and compliance with ISO 26262, ISO 21448 (SOTIF), and ISO/SAE 21434. This paper analyzes the role of RISC-V in automotive functional safety, focusing on ISA openness, formal verifiability, custom extension control, debug transparency, and vendor-independent qualification. We examine autonomous driving safety requirements and map them to RISC-V architectural challenges such as lockstep execution, safety islands, mixed-criticality isolation, and secure debug. Rather than proposing a single algorithmic breakthrough, we present an analytical framework and research roadmap centered on certification economics as the primary optimization objective. We also discuss how selected ML methods, including LLM-assisted FMEDA generation, knowledge-graph-based safety case automation, reinforcement learning for fault injection, and graph neural networks for diagnostic coverage, can support certification workflows. We argue that the strongest outcome is not a faster core, but an ASIL-D-ready certifiable RISC-V platform.