# SpiderCam: Low-Power Snapshot Depth from Differential Defocus

arXiv: https://arxiv.org/abs/2603.17910 · HTML: https://mlsanity.com/paper/2603.17910/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 7 of its 72 references that are in the map.
- First posted on arXiv 18 Mar 2026.

## Builds on (most cited first, 7 of 7)

- [A Survey of Structure from Motion](https://mlsanity.com/paper/1701.08493/) (2017)
- [AI and Memory Wall](https://mlsanity.com/paper/2403.14123/) (2024)
- [A Survey on Deep Learning Techniques for Stereo-based Depth Estimation](https://mlsanity.com/paper/2006.02535/) (2020)
- [Monocular Depth Estimation: A Survey](https://mlsanity.com/paper/1901.09402/) (2019)
- [OMNI-DC: Highly Robust Depth Completion with Multiresolution Depth Integration](https://mlsanity.com/paper/2411.19278/) (2024)
- [An Overview of Depth Cameras and Range Scanners Based on Time-of-Flight Technologies](https://mlsanity.com/paper/2012.06772/) (2020)
- [Focal Split: Untethered Snapshot Depth from Differential Defocus](https://mlsanity.com/paper/2504.11202/) (2025)

## Built on by (most cited first, 1 of 1)

- [Depth from Dual Differential Defocus and Stereo Consensus](https://mlsanity.com/paper/2606.02906/) (2026)

## Abstract (arXiv)

We introduce SpiderCam, an FPGA-based snapshot depth-from-defocus camera which produces 480x400 sparse depth maps in real-time at 32.5 FPS over a working range of 52 cm while consuming 624 mW of power in total. SpiderCam comprises a custom camera that simultaneously captures two differently focused images of the same scene, processed with a SystemVerilog implementation of depth from differential defocus (DfDD) on a low-power FPGA. To achieve state-of-the-art power consumption, we present algorithmic improvements to DfDD that overcome challenges caused by low-power sensors, and design a memory-local implementation for streaming depth computation on a device that is too small to store even a single image pair. We report the first sub-Watt total power measurement for passive FPGA-based 3D cameras in the literature.