# Machine Learning-Driven Intelligent Memory System Design: From On-Chip Caches to Storage

arXiv: https://arxiv.org/abs/2603.14583 · HTML: https://mlsanity.com/paper/2603.14583/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Placed in RL for energy, networks and operations, one of 15 directions in Deep reinforcement learning methods.
- Builds on 23 of its 203 references that are in the map.
- First posted on arXiv 15 Mar 2026.

## Placed in

- Deep reinforcement learning methods / [RL for energy, networks and operations](https://mlsanity.com/deeprl/rl-for-energy-networks-and-operations/)

## Builds on (most cited first, 23 of 23)

- [A Modern Primer on Processing in Memory](https://mlsanity.com/paper/2012.03112/) (2020)
- [An Imitation Learning Approach for Cache Replacement](https://mlsanity.com/paper/2006.16239/) (2020)
- [Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks](https://mlsanity.com/paper/2109.14320/) (2021)
- [PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System](https://mlsanity.com/paper/2502.15470/) (2025)
- [Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning](https://mlsanity.com/paper/2109.12021/) (2021)
- [The Championship Simulator: Architectural Simulation for Education and Competition](https://mlsanity.com/paper/2210.14324/) (2022)
- [BigDataBench: a Big Data Benchmark Suite from Internet Services](https://mlsanity.com/paper/1401.1406/) (2014)
- [FPGA-Based Near-Memory Acceleration of Modern Data-Intensive Applications](https://mlsanity.com/paper/2106.06433/) (2021)
- [Sibyl: Adaptive and Extensible Data Placement in Hybrid Storage Systems Using Online Reinforcement Learning](https://mlsanity.com/paper/2205.07394/) (2022)
- [Accelerating Genome Analysis: A Primer on an Ongoing Journey](https://mlsanity.com/paper/2008.00961/) (2020)
- [Intelligent Architectures for Intelligent Computing Systems](https://mlsanity.com/paper/2012.12381/) (2020)
- [GenStore: A High-Performance and Energy-Efficient In-Storage Computing System for Genome Sequence Analysis](https://mlsanity.com/paper/2202.10400/) (2022)
- [MegIS: High-Performance, Energy-Efficient, and Low-Cost Metagenomic Analysis with In-Storage Processing](https://mlsanity.com/paper/2406.19113/) (2024)
- [DSPatch: Dual Spatial Pattern Prefetcher](https://mlsanity.com/paper/1910.03075/) (2019)
- [Reducing Load Latency with Cache Level Prediction](https://mlsanity.com/paper/2103.14808/) (2021)
- [Memory-Centric Computing: Solving Computing's Memory Problem](https://mlsanity.com/paper/2505.00458/) (2025)
- [Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction](https://mlsanity.com/paper/2209.00188/) (2022)
- [GenPIP: In-Memory Acceleration of Genome Analysis via Tight Integration of Basecalling and Read Mapping](https://mlsanity.com/paper/2209.08600/) (2022)
- [Gaze into the Pattern: Characterizing Spatial Patterns with Internal Temporal Correlations for Hardware Prefetching](https://mlsanity.com/paper/2412.05211/) (2024)
- [MARS: Processing-In-Memory Acceleration of Raw Signal Genome Analysis Inside the Storage Subsystem](https://mlsanity.com/paper/2506.10931/) (2025)
- [SAGe: A Lightweight Algorithm-Architecture Co-Design for Mitigating the Data Preparation Bottleneck in Large-Scale Genome Sequence Analysis](https://mlsanity.com/paper/2504.03732/) (2025)
- [Athena: Synergizing Data Prefetching and Off-Chip Prediction via Online Reinforcement Learning](https://mlsanity.com/paper/2601.17615/) (2026)
- [Mitigating the Memory Bottleneck with Machine Learning-Driven and Data-Aware Microarchitectural Techniques](https://mlsanity.com/paper/2603.07683/) (2026)

## Abstract (arXiv)

Despite the data-rich environment in which memory systems of modern computing platforms operate, many state-of-the-art architectural policies employed in the memory system rely on static, human-designed heuristics that fail to truly adapt to the workload and system behavior via principled learning methodologies. In this article, we propose a fundamentally different design approach: using lightweight and practical machine learning (ML) methods to enable adaptive, data-driven control throughout the memory hierarchy. We present three ML-guided architectural policies: (1) Pythia, a reinforcement learning-based data prefetcher for on-chip caches, (2) Hermes, a perceptron learning-based off-chip predictor for multi-level cache hierarchies, and (3) Sibyl, a reinforcement learning-based data placement policy for hybrid storage systems. Our evaluation shows that Pythia, Hermes, and Sibyl significantly outperform the best-prior human-designed policies, while incurring modest hardware overheads. Collectively, this article demonstrates that integrating adaptive learning into memory subsystems can lead to intelligent, self-optimizing architectures that unlock performance and efficiency gains beyond what is possible with traditional human-designed approaches.