# Retrieve, Schedule, Reflect: LLM Agents for Chip QoR Optimization

arXiv: https://arxiv.org/abs/2603.13767 · HTML: https://mlsanity.com/paper/2603.13767/

## Key facts

- Cited by 3 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 14 Mar 2026.

## Built on by (most cited first, 3 of 3)

- [AgenticECO: An Agentic Framework for ECO on 3D Integrated Circuits](https://mlsanity.com/paper/2608.03738/) (2026)
- [WaveletECO: A Closed-Loop Physical ECO Platform and a Specialized Local Language Model](https://mlsanity.com/paper/2609.23444/) (2026)
- [LATCH: LLM-Assisted Timing Closure Harness for Post-Route FPGA Optimisation](https://mlsanity.com/paper/2610.16625/) (2026)

## Abstract (arXiv)

Modern chip design requires multi-objective optimization of timing, power, and area under stringent time-to-market constraints. Although powerful optimization algorithms are integrated into EDA tools, achieving high QoR hinges on effective long-horizon scheduling, which relies heavily on manual expert intervention. To address this issue and automate chip design, we propose an agentic LLM framework that schedules chip optimizations through direct interaction with EDA tools. The agent is grounded in natural language expertise expressed as a search tree through retrieval-augmented generation (RAG). We further improve scheduling quality with Pareto-driven QoR feedback through language reflection. Experimental results show that, compared with black-box search methods such as reinforcement learning, our framework achieves 10% greater timing improvement while consuming less power and area, with more than 4x speedup. The post-optimization QoR is also comparable to that achieved by human experts. Finally, the agent supports customized tasks expressed in natural language, enabling preferential QoR trade-offs. The code and chip design data will be publicly available at https://github.com/YiKangOY/Open-LLM-ECO.