# CORVET: A CORDIC-Powered, Resource-Frugal Mixed-Precision Vector Processing Engine for High-Throughput AIoT applications

arXiv: https://arxiv.org/abs/2602.19268 · HTML: https://mlsanity.com/paper/2602.19268/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 6 of its 42 references that are in the map.
- First posted on arXiv 22 Feb 2026.

## Builds on (most cited first, 6 of 6)

- [RAMAN: A Re-configurable and Sparse tinyML Accelerator for Inference on Edge](https://mlsanity.com/paper/2306.06493/) (2023)
- [How to keep pushing ML accelerator performance? Know your rooflines!](https://mlsanity.com/paper/2505.16346/) (2025)
- [POLARON: Precision-aware On-device Learning and Adaptive Runtime-cONfigurable AI acceleration](https://mlsanity.com/paper/2506.08785/) (2025)
- [HYDRA: Hybrid Data Multiplexing and Run-time Layer Configurable DNN Accelerator](https://mlsanity.com/paper/2409.04976/) (2024)
- [XR-NPE: High-Throughput Mixed-precision SIMD Neural Processing Engine for Extended Reality Perception Workloads](https://mlsanity.com/paper/2508.13049/) (2025)
- [CoDrone: Autonomous Drone Navigation Assisted by Edge and Cloud Foundation Models](https://mlsanity.com/paper/2512.19083/) (2025)

## Built on by (most cited first, 1 of 1)

- [SPARX: Secure and Privacy-Aware Approximate CNN Acceleration with Edge RISC-V SoC](https://mlsanity.com/paper/2606.09946/) (2026)

## Abstract (arXiv)

This brief presents a runtime-adaptive, performance-enhanced vector engine featuring a low-resource, iterative CORDIC-based MAC unit for edge AI acceleration. The proposed design enables dynamic reconfiguration between approximate and accurate modes, exploiting the latency-accuracy trade-off for a wide range of workloads. Its resource-efficient approach further enables up to 4x throughput improvement within the same hardware resources by leveraging vectorised, time-multiplexed execution and flexible precision scaling. With a time-multiplexed multi-AF block and a lightweight pooling and normalisation unit, the proposed vector engine supports flexible precision (4/8/16-bit) and high MAC density. The ASIC implementation results show that each MAC stage can save up to 33% of time and 21% of power, with a 256-PE configuration that achieves higher compute density (4.83 TOPS/mm2 ) and energy efficiency (11.67 TOPS/W) than previous state-of-the-art work. A detailed hardware-software co-design methodology for object detection and classification tasks on Pynq-Z2 is discussed to assess the proposed architecture, demonstrating a scalable, energy-efficient solution for edge AI applications.