# Hardware Software Optimizations for Fast Model Recovery on Reconfigurable Architectures

arXiv: https://arxiv.org/abs/2512.06113 · HTML: https://mlsanity.com/paper/2512.06113/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 18 of its 49 references that are in the map.
- First posted on arXiv 5 Dec 2025.

## Builds on (most cited first, 18 of 18)

- [Neural Ordinary Differential Equations](https://mlsanity.com/paper/1806.07366/) (2018)
- [XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks](https://mlsanity.com/paper/1603.05279/) (2016)
- [A Survey of Quantization Methods for Efficient Neural Network Inference](https://mlsanity.com/paper/2103.13630/) (2021)
- [PACT: Parameterized Clipping Activation for Quantized Neural Networks](https://mlsanity.com/paper/1805.06085/) (2018)
- [Binary Neural Networks: A Survey](https://mlsanity.com/paper/2004.03333/) (2020)
- [Physics-informed learning of governing equations from scarce data](https://mlsanity.com/paper/2005.03448/) (2020)
- [Liquid Time-constant Networks](https://mlsanity.com/paper/2006.04439/) (2020)
- [Neural Flows: Efficient Alternative to Neural ODEs](https://mlsanity.com/paper/2110.13040/) (2021)
- [Convolutional Differentiable Logic Gate Networks](https://mlsanity.com/paper/2411.04732/) (2024)
- [Physics-guided Loss Functions Improve Deep Learning Performance in Inverse Scattering](https://mlsanity.com/paper/2111.09109/) (2021)
- [Accelerating Recurrent Neural Networks for Gravitational Wave Experiments](https://mlsanity.com/paper/2106.14089/) (2021)
- [Don't Be So Dense: Sparse-to-Sparse GAN Training Without Sacrificing Performance](https://mlsanity.com/paper/2203.02770/) (2022)
- [Recovering implicit physics model under real-world constraints](https://mlsanity.com/paper/2412.02215/) (2024)
- [Accelerating ODE-Based Neural Networks on Low-Cost FPGAs](https://mlsanity.com/paper/2012.15465/) (2020)
- [EdgeDRNN: Enabling Low-latency Recurrent Neural Network Edge Inference](https://mlsanity.com/paper/1912.12193/) (2019)
- [FPGA Technology Mapping Using Sketch-Guided Program Synthesis](https://mlsanity.com/paper/2401.16526/) (2024)
- [RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis](https://mlsanity.com/paper/2410.13079/) (2024)
- [OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit](https://mlsanity.com/paper/2306.16665/) (2023)

## Abstract (arXiv)

Model Recovery (MR) is a core primitive for physical AI and real-time digital twins, but GPUs often execute MR inefficiently due to iterative dependencies, kernel-launch overheads, underutilized memory bandwidth, and high data-movement latency. We present MERINDA, an FPGA-accelerated MR framework that restructures computation as a streaming dataflow pipeline. MERINDA exploits on-chip locality through BRAM tiling, fixed-point kernels, and the concurrent use of LUT fabric and carry-chain adders to expose fine-grained spatial parallelism while minimizing off-chip traffic. This hardware-aware formulation removes synchronization bottlenecks and sustains high throughput across the iterative updates in MR. On representative MR workloads, MERINDA delivers up to 6.3x fewer cycles than an FPGA-based LTC baseline, enabling real-time performance for time-critical physical systems.