# NX-CGRA: A Programmable Hardware Accelerator for Core Transformer Algorithms on Edge Devices

arXiv: https://arxiv.org/abs/2511.17235 · HTML: https://mlsanity.com/paper/2511.17235/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 21 Nov 2025.

## Built on by (most cited first, 1 of 1)

- [Implementation and Evaluation of BitNet Inference on a CGLA by Signed-Int4 Instructions](https://mlsanity.com/paper/2609.27453/) (2026)

## Abstract (arXiv)

The increasing diversity and complexity of transformer workloads at the edge present significant challenges in balancing performance, energy efficiency, and architectural flexibility. This paper introduces NX-CGRA, a programmable hardware accelerator designed to support a range of transformer inference algorithms, including both linear and non-linear functions. Unlike fixed-function accelerators optimized for narrow use cases, NX-CGRA employs a coarse-grained reconfigurable array (CGRA) architecture with software-driven programmability, enabling efficient execution across varied kernel patterns. The architecture is evaluated using representative benchmarks derived from real-world transformer models, demonstrating high overall efficiency and favorable energy-area tradeoffs across different classes of operations. These results indicate the potential of NX-CGRA as a scalable and adaptable hardware solution for edge transformer deployment under constrained power and silicon budgets.