# Automated Hardware Trojan Insertion in Industrial-Scale Designs

arXiv: https://arxiv.org/abs/2511.08703 · HTML: https://mlsanity.com/paper/2511.08703/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 5 of its 24 references that are in the map.
- First posted on arXiv 11 Nov 2025.

## Builds on (most cited first, 5 of 5)

- [HW2VEC: A Graph Learning Tool for Automating Hardware Security](https://mlsanity.com/paper/2107.12328/) (2021)
- [TrojanSAINT: Gate-Level Netlist Sampling-Based Inductive Learning for Hardware Trojan Detection](https://mlsanity.com/paper/2301.11804/) (2023)
- [Hardware Trojan Detection through Information Flow Security Verification](https://mlsanity.com/paper/1803.04102/) (2018)
- [AdaTest:Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection](https://mlsanity.com/paper/2204.06117/) (2022)
- [Node-wise Hardware Trojan Detection Based on Graph Learning](https://mlsanity.com/paper/2112.02213/) (2021)

## Built on by (most cited first, 1 of 1)

- [ADVERSARIAL: And-Inverter Graph-Assisted Hardware Trojan Detection At Scale](https://mlsanity.com/paper/2607.23882/) (2026)

## Abstract (arXiv)

Industrial Systems-on-Chips (SoCs) often comprise hundreds of thousands to millions of nets and millions to tens of millions of connectivity edges, making empirical evaluation of hardware-Trojan (HT) detectors on realistic designs both necessary and difficult. Public benchmarks remain significantly smaller and hand-crafted, while releasing truly malicious RTL raises ethical and operational risks. This work presents an automated and scalable methodology for generating HT-like patterns in industry-scale netlists whose purpose is to stress-test detection tools without altering user-visible functionality. The pipeline (i) parses large gate-level designs into connectivity graphs, (ii) explores rare regions using SCOAP testability metrics, and (iii) applies parameterized, function-preserving graph transformations to synthesize trigger-payload pairs that mimic the statistical footprint of stealthy HTs. When evaluated on the benchmarks generated in this work, representative state-of-the-art graph-learning models fail to detect Trojans. The framework closes the evaluation gap between academic circuits and modern SoCs by providing reproducible challenge instances that advance security research without sharing step-by-step attack instructions.