# Accelerating HDC-CNN Hybrid Models Using Custom Instructions on RISC-V GPUs

arXiv: https://arxiv.org/abs/2511.05053 · HTML: https://mlsanity.com/paper/2511.05053/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 4 of its 18 references that are in the map.
- First posted on arXiv 7 Nov 2025.

## Builds on (most cited first, 4 of 4)

- [Scaling Laws for Neural Language Models](https://mlsanity.com/paper/2001.08361/) (2020)
- [Hyperdimensional Computing vs. Neural Networks: Comparing Architecture and Learning Process](https://mlsanity.com/paper/2207.12932/) (2022)
- [Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch](https://mlsanity.com/paper/2110.10857/) (2021)
- [Cycle-Accurate Evaluation of Software-Hardware Co-Design of Decimal Computation in RISC-V Ecosystem](https://mlsanity.com/paper/2003.05315/) (2020)

## Abstract (arXiv)

Machine learning based on neural networks has advanced rapidly, but the high energy consumption required for training and inference remains a major challenge. Hyperdimensional Computing (HDC) offers a lightweight, brain-inspired alternative that enables high parallelism but often suffers from lower accuracy on complex visual tasks. To overcome this, hybrid accelerators combining HDC and Convolutional Neural Networks (CNNs) have been proposed, though their adoption is limited by poor generalizability and programmability. The rise of open-source RISC-V architectures has created new opportunities for domain-specific GPU design. Unlike traditional proprietary GPUs, emerging RISC-V-based GPUs provide flexible, programmable platforms suitable for custom computation models such as HDC. In this study, we design and implement custom GPU instructions optimized for HDC operations, enabling efficient processing for hybrid HDC-CNN workloads. Experimental results using four types of custom HDC instructions show a performance improvement of up to 56.2 times in microbenchmark tests, demonstrating the potential of RISC-V GPUs for energy-efficient, high-performance computing.