# FeNN-DMA: A RISC-V SoC for SNN acceleration

arXiv: https://arxiv.org/abs/2511.00732 · HTML: https://mlsanity.com/paper/2511.00732/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 20 of its 62 references that are in the map.
- First posted on arXiv 1 Nov 2025.

## Builds on (most cited first, 20 of 20)

- [Converting Static Image Datasets to Spiking Neuromorphic Datasets Using Saccades](https://mlsanity.com/paper/1507.07629/) (2015)
- [The Heidelberg spiking datasets for the systematic evaluation of spiking neural networks](https://mlsanity.com/paper/1910.07407/) (2019)
- [Event-Based Backpropagation can compute Exact Gradients for Spiking Neural Networks](https://mlsanity.com/paper/2009.08378/) (2020)
- [Learning Delays in Spiking Neural Networks using Dilated Convolutions with Learnable Spacings](https://mlsanity.com/paper/2306.17670/) (2023)
- [SpiNNaker2: A Large-Scale Neuromorphic System for Event-Based and Asynchronous Machine Learning](https://mlsanity.com/paper/2401.04491/) (2024)
- [Neuromorphic Intermediate Representation: A Unified Instruction Set for Interoperable Brain-Inspired Computing](https://mlsanity.com/paper/2311.14641/) (2023)
- [DYNAP-SE2: a scalable multi-core dynamic neuromorphic asynchronous spiking neural network processor](https://mlsanity.com/paper/2310.00564/) (2023)
- [Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge](https://mlsanity.com/paper/2401.01141/) (2024)
- [Scrambled Linear Pseudorandom Number Generators](https://mlsanity.com/paper/1805.01407/) (2018)
- [Snitch: A tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads](https://mlsanity.com/paper/2002.10143/) (2020)
- [Efficient Event-based Delay Learning in Spiking Neural Networks](https://mlsanity.com/paper/2501.07331/) (2025)
- [Braille Letter Reading: A Benchmark for Spatio-Temporal Pattern Recognition on Neuromorphic Hardware](https://mlsanity.com/paper/2205.15864/) (2022)
- [FireFly v2: Advancing Hardware Support for High-Performance Spiking Neural Network with a Spatiotemporal FPGA Accelerator](https://mlsanity.com/paper/2309.16158/) (2023)
- [An FPGA-based Massively Parallel Neuromorphic Cortex Simulator](https://mlsanity.com/paper/1803.03015/) (2018)
- [SPEED: A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference](https://mlsanity.com/paper/2409.14017/) (2024)
- [FeNN: A RISC-V vector processor for Spiking Neural Network acceleration](https://mlsanity.com/paper/2506.11760/) (2025)
- [A Complete Pipeline for deploying SNNs with Synaptic Delays on Loihi 2](https://mlsanity.com/paper/2510.13757/) (2025)
- [SpikeStream: Accelerating Spiking Neural Network Inference on RISC-V Clusters with Sparse Computation Extensions](https://mlsanity.com/paper/2504.06134/) (2025)
- [CVA6S+: A Superscalar RISC-V Core with High-Throughput Memory Architecture](https://mlsanity.com/paper/2505.03762/) (2025)
- [A flexible framework for structural plasticity in GPU-accelerated sparse spiking neural networks](https://mlsanity.com/paper/2510.19764/) (2025)

## Abstract (arXiv)

Spiking Neural Networks (SNNs) are a promising, energy-efficient alternative to standard Artificial Neural Networks (ANNs) and are particularly well-suited to spatio-temporal tasks such as keyword spotting and video classification. However, SNNs have a much lower arithmetic intensity than ANNs and are therefore not well-matched to standard accelerators like GPUs and TPUs. Field Programmable Gate Arrays (FPGAs) are designed for such memory-bound workloads, and here we present a novel, fully-programmable RISC-V-based system-on-chip (FeNN-DMA), tailored to simulating SNNs on modern UltraScale+ FPGAs. We show that FeNN-DMA has comparable resource usage and energy requirements to state-of-the-art fixed-function SNN accelerators, yet it supports more complex neuron models and network topologies, and can simulate up to 16 thousand neurons and 256 million synapses per core. Using this functionality, we demonstrate state-of-the-art classification accuracy on the Spiking Heidelberg Digits, Neuromorphic MNIST and Braille tactile classification tasks.