# RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Prediction

arXiv: https://arxiv.org/abs/2508.16403 · HTML: https://mlsanity.com/paper/2508.16403/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 9 of its 48 references that are in the map.
- First posted on arXiv 22 Aug 2025.

## Builds on (most cited first, 9 of 9)

- [A Comprehensive Survey on Graph Neural Networks](https://mlsanity.com/paper/1901.00596/) (2019)
- [Fast Graph Representation Learning with PyTorch Geometric](https://mlsanity.com/paper/1903.02428/) (2019)
- [DeeperGCN: All You Need to Train Deeper GCNs](https://mlsanity.com/paper/2006.07739/) (2020)
- [GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning](https://mlsanity.com/paper/2005.00406/) (2020)
- [Pretraining Graph Neural Networks for few-shot Analog Circuit Modeling and Design](https://mlsanity.com/paper/2203.15913/) (2022)
- [TAG: Learning Circuit Spatial Embedding From Layouts](https://mlsanity.com/paper/2209.03465/) (2022)
- [FuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method](https://mlsanity.com/paper/2308.02050/) (2023)
- [Supervised Learning for Analog and RF Circuit Design: Benchmarks and Comparative Insights](https://mlsanity.com/paper/2501.11839/) (2025)
- [FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design](https://mlsanity.com/paper/2505.21923/) (2025)

## Abstract (arXiv)

Accurately predicting the performance of active radio frequency (RF) circuits is essential for modern wireless systems but remains challenging due to highly nonlinear behavior and the high computational cost of traditional simulation tools. Existing machine learning (ML) surrogates often require large datasets to generalize across various topologies or are not accurate on held-out circuits. This work presents a lightweight, data-efficient, and topology-aware graph neural network (GNN) framework for predicting key performance metrics of active RF circuit classes, such as low-noise amplifiers (LNAs), mixers, voltage-controlled oscillators (VCOs), power amplifiers (PAs), and voltage amplifiers (VAs). The proposed framework employs RFIC domain-informed feature indexing to enable cross-topology adaptability by cheap encoding of functional device semantics (e.g., differential pair and varactor transistors) and efficient knowledge transfer. The surrogate model represents circuits using device-terminal graph abstractions to preserve fine-grained connectivity and transistor-level symmetry. The final model is generalized to a wide variety of classes by being trained in parallel. Experimental results demonstrate accurate modeling of multimodal and heavy-tailed RF performance distributions, achieving an average mean relative error (MRE) of 2.71% across nineteen topologies, an improvement of 3.3x and 20x faster in training over prior art, and the generalization to held-out topologies is improved by ~26.2x. Furthermore, this work shows ~36x training data efficiency compared to state-of-the-art, demonstrating its effectiveness for scalable and deployment-ready RF design automation.
