# OpenYield: An Open-Source SRAM Yield Analysis and Optimization Benchmark Suite

arXiv: https://arxiv.org/abs/2508.04106 · HTML: https://mlsanity.com/paper/2508.04106/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 6 Aug 2025.

## Built on by (most cited first, 2 of 2)

- [Breaking the Tuning Barrier: Zero-Hyperparameters Yield Multi-Corner Analysis Via Learned Priors](https://mlsanity.com/paper/2603.13092/) (2026)
- [ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuits](https://mlsanity.com/paper/2607.23225/) (2026)

## Abstract (arXiv)

Static Random-Access Memory (SRAM) yield analysis is essential for semiconductor innovation, yet research progress faces a critical challenge: the large gap between simplified academic models and the complexities observed in practice. The lack of open, higher-fidelity benchmarks has hindered reproducibility and transferability, as promising academic techniques often fail to carry over to more realistic settings. We present OpenYield, an open-source ecosystem that aims to narrow this gap through three contributions: (i) An SRAM circuit generator that explicitly incorporates second-order effects (interconnect/line parasitics, inter-cell leakage coupling, and peripheral-circuit variations) that are commonly omitted in academic studies. (ii) A standardized evaluation platform with a simple interface and baseline yield-analysis implementations to enable fair comparisons and reproducible research on these higher-fidelity circuits. (iii) An optimization platform for transistor-level sizing under these models, supporting reproducible studies of robustness/efficiency trade-offs. OpenYield aims to foster more reproducible and transferable progress in SRAM-yield research. The framework is publicly available at https://github.com/ShenShan123/OpenYield