# CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance

arXiv: https://arxiv.org/abs/2505.18577 · HTML: https://mlsanity.com/paper/2505.18577/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 24 May 2025.

## Built on by (most cited first, 1 of 1)

- [Bridging LLM Serving and CXL-SSDs with Chunk-Aware KV Cache Management](https://mlsanity.com/paper/2609.26828/) (2026)

## Abstract (arXiv)

Integrating compute express link (CXL) with SSDs allows scalable access to large memory but has slower speeds than DRAMs. We present ExPAND, an expander-driven CXL prefetcher that offloads last-level cache (LLC) prefetching from host CPU to CXL-SSDs. ExPAND uses a heterogeneous prediction algorithm for prefetching and ensures data consistency with CXL.mem's back-invalidation. We examine prefetch timeliness for accurate latency estimation. ExPAND, being aware of CXL multi-tiered switching, provides end-to-end latency for each CXL-SSD and precise prefetch timeliness estimations. Our method reduces CXL-SSD reliance and enables direct host cache access for most data. ExPAND enhances graph application performance and SPEC CPU's performance by 9.0× and 14.7×, respectively, surpassing CXL-SSD pools with diverse prefetching strategies.