# OASIS: Optimized Lightweight Autoencoder System for Distributed In-Sensor computing

arXiv: https://arxiv.org/abs/2505.02256 · HTML: https://mlsanity.com/paper/2505.02256/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 4 May 2025.

## Built on by (most cited first, 2 of 2)

- [Hardware-Aware Learned Representation Compression for Distributed In-Sensor Vision](https://mlsanity.com/paper/2609.13947/) (2026)
- [Chameleon: Dynamic Format Adapter for Efficient Diffusion](https://mlsanity.com/paper/2609.33496/) (2026)

## Abstract (arXiv)

In-sensor computing, which integrates computation directly within the sensor, has emerged as a promising paradigm for machine vision applications such as AR/VR and smart home systems. By processing data on-chip before transmission, it alleviates the bandwidth bottleneck caused by high-resolution, high-frame-rate image transmission. We propose a system architecture that integrates a CMOS image sensor (CIS) with a logic chip via advanced packaging, where the logic chip executes a lightweight encoder that aggressively compresses activations before off-chip transmission. However, conventional deep neural network (DNN) partitioning strategies require multiple layers before achieving meaningful dimensionality reduction, limiting bandwidth savings. To address this, we propose a dual-branch autoencoder-based vision architecture trained with a triple loss function combining task-specific, entropy, and reconstruction objectives to produce compact, Huffman-codable representations. The encoder is prototyped on a FPGA to provide hardware-validated energy measurements, complementing circuit-simulated CIS front-end characterization. Our approach achieves a four-order-of-magnitude reduction in transmitted data volume compared to raw input images, resulting in 2×-4.5× energy savings. We evaluate on CNN and ViT-based models across diverse tasks, achieving state-of-the-art accuracy with energy efficiency of up to 22.7 TOPS/W.