# ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA

arXiv: https://arxiv.org/abs/2505.02016 · HTML: https://mlsanity.com/paper/2505.02016/

## Key facts

- Cited by 8 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 4 May 2025.

## Built on by (most cited first, 8 of 8)

- [Revolution or Hype? Seeking the Limits of Large Models in Hardware Design](https://mlsanity.com/paper/2509.04905/) (2025)
- [Functional Matching of Logic Subgraphs: Beyond Structural Isomorphism](https://mlsanity.com/paper/2505.21988/) (2025)
- [R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII](https://mlsanity.com/paper/2604.08810/) (2026)
- [CapBench: A Multi-PDK Dataset for Machine-Learning-Based Post-Layout Capacitance Extraction](https://mlsanity.com/paper/2604.11202/) (2026)
- [RTL-BenchLS: A Large-Scale Benchmark for RTL Reasoning and Generation with Large Language Models](https://mlsanity.com/paper/2606.08976/) (2026)
- [TRACE: Learning to Compute on Circuit Graphs](https://mlsanity.com/paper/2509.21886/) (2025)
- [GNN-based Path-aware multi-view Circuit Learning for Technology Mapping](https://mlsanity.com/paper/2601.14286/) (2026)
- [CircuitGate: Logic-Consistent Circuit-Level Functional Modeling for And-Inverter Graphs](https://mlsanity.com/paper/2610.09549/) (2026)

## Abstract (arXiv)

We introduce ForgeEDA, an open-source comprehensive circuit dataset across various categories. ForgeEDA includes diverse circuit representations such as Register Transfer Level (RTL) code, Post-mapping (PM) netlists, And-Inverter Graphs (AIGs), and placed netlists, enabling comprehensive analysis and development. We demonstrate ForgeEDA's utility by benchmarking state-of-the-art EDA algorithms on critical tasks such as Power, Performance, and Area (PPA) optimization, highlighting its ability to expose performance gaps and drive advancements. Additionally, ForgeEDA's scale and diversity facilitate the training of AI models for EDA tasks, demonstrating its potential to improve model performance and generalization. By addressing limitations in existing datasets, ForgeEDA aims to catalyze breakthroughs in modern IC design and support the next generation of innovations in EDA.