# A Bespoke Design Approach to Low-Power Printed Microprocessors for Machine Learning Applications

arXiv: https://arxiv.org/abs/2503.21671 · HTML: https://mlsanity.com/paper/2503.21671/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 27 Mar 2025.

## Built on by (most cited first, 1 of 1)

- [Hybrid unary-binary design for multiplier-less printed Machine Learning classifiers](https://mlsanity.com/paper/2509.15316/) (2025)

## Abstract (arXiv)

Printed electronics have gained significant traction in recent years, presenting a viable path to integrating computing into everyday items, from disposable products to low-cost healthcare. However, the adoption of computing in these domains is hindered by strict area and power constraints, limiting the effectiveness of general-purpose microprocessors. This paper proposes a bespoke microprocessor design approach to address these challenges, by tailoring the design to specific applications and eliminating unnecessary logic. Targeting machine learning applications, we further optimize core operations by integrating a SIMD MAC unit supporting 4 precision configurations that boost the efficiency of microprocessors. Our evaluation across 6 ML models and the large-scale Zero-Riscy core, shows that our methodology can achieve improvements of 22.2%, 23.6%, and 33.79% in area, power, and speed, respectively, without compromising accuracy. Against state-of-the-art printed processors, our approach can still offer significant speedups, but along with some accuracy degradation. This work explores how such trade-offs can enable low-power printed microprocessors for diverse ML applications.