# Compact Yet Highly Accurate Printed Classifiers Using Sequential Support Vector Machine Circuits

arXiv: https://arxiv.org/abs/2502.01498 · HTML: https://mlsanity.com/paper/2502.01498/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 7 of its 23 references that are in the map.
- First posted on arXiv 3 Feb 2025.

## Builds on (most cited first, 7 of 7)

- [Cross-Layer Approximation For Printed Machine Learning Circuits](https://mlsanity.com/paper/2203.05915/) (2022)
- [Co-Design of Approximate Multilayer Perceptron for Ultra-Resource Constrained Printed Circuits](https://mlsanity.com/paper/2302.14576/) (2023)
- [Approximate Computing and the Efficient Machine Learning Expedition](https://mlsanity.com/paper/2210.00497/) (2022)
- [Model-to-Circuit Cross-Approximation For Printed Machine Learning Classifiers](https://mlsanity.com/paper/2303.08255/) (2023)
- [Bespoke Approximation of Multiplication-Accumulation and Activation Targeting Printed Multilayer Perceptrons](https://mlsanity.com/paper/2312.17612/) (2023)
- [Embedding Hardware Approximations in Discrete Genetic-based Training for Printed MLPs](https://mlsanity.com/paper/2402.02930/) (2024)
- [Evolutionary Approximation of Ternary Neurons for On-sensor Printed Neural Networks](https://mlsanity.com/paper/2407.20589/) (2024)

## Abstract (arXiv)

Printed Electronics (PE) technology has emerged as a promising alternative to silicon-based computing. It offers attractive properties such as on-demand ultra-low-cost fabrication, mechanical flexibility, and conformality. However, PE are governed by large feature sizes, prohibiting the realization of complex printed Machine Learning (ML) classifiers. Leveraging PE's ultra-low non-recurring engineering and fabrication costs, designers can fully customize hardware to a specific ML model and dataset, significantly reducing circuit complexity. Despite significant advancements, state-of-the-art solutions achieve area efficiency at the expense of considerable accuracy loss. Our work mitigates this by designing area- and power-efficient printed ML classifiers with little to no accuracy degradation. Specifically, we introduce the first sequential Support Vector Machine (SVM) classifiers, exploiting the hardware efficiency of bespoke control and storage units and a single Multiply-Accumulate compute engine. Our SVMs yield on average 6x lower area and 4.6% higher accuracy compared to the printed state of the art.