# Current Opinions on Memristor-Accelerated Machine Learning Hardware

arXiv: https://arxiv.org/abs/2501.12644 · HTML: https://mlsanity.com/paper/2501.12644/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 7 of its 142 references that are in the map.
- First posted on arXiv 22 Jan 2025.

## Builds on (most cited first, 7 of 7)

- [PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference](https://mlsanity.com/paper/1901.10351/) (2019)
- [Accurate online training of dynamical spiking neural networks through Forward Propagation Through Time](https://mlsanity.com/paper/2112.11231/) (2021)
- [PANTHER: A Programmable Architecture for Neural Network Training Harnessing Energy-efficient ReRAM](https://mlsanity.com/paper/1912.11516/) (2019)
- [High-Throughput In-Memory Computing for Binary Deep Neural Networks with Monolithically Integrated RRAM and 90nm CMOS](https://mlsanity.com/paper/1909.07514/) (2019)
- [Neural Sampling Machine with Stochastic Synapse allows Brain-like Learning and Inference](https://mlsanity.com/paper/2102.10477/) (2021)
- [One-step regression and classification with crosspoint resistive memory arrays](https://mlsanity.com/paper/2005.01988/) (2020)
- [Bulk-Switching Memristor-based Compute-In-Memory Module for Deep Neural Network Training](https://mlsanity.com/paper/2305.14547/) (2023)

## Built on by (most cited first, 1 of 1)

- [A Gradient-based yet Spike-Timing-Dependent Solution to the Feedback Learning Problem in Neural Microcircuits](https://mlsanity.com/paper/2609.08070/) (2026)

## Abstract (arXiv)

The unprecedented advancement of artificial intelligence has placed immense demands on computing hardware, but traditional silicon-based semiconductor technologies are approaching their physical and economic limit, prompting the exploration of novel computing paradigms. Memristor offers a promising solution, enabling in-memory analog computation and massive parallelism, which leads to low latency and power consumption. This manuscript reviews the current status of memristor-based machine learning accelerators, highlighting the milestones achieved in developing prototype chips, that not only accelerate neural networks inference but also tackle other machine learning tasks. More importantly, it discusses our opinion on current key challenges that remain in this field, such as device variation, the need for efficient peripheral circuitry, and systematic co-design and optimization. We also share our perspective on potential future directions, some of which address existing challenges while others explore untouched territories. By addressing these challenges through interdisciplinary efforts spanning device engineering, circuit design, and systems architecture, memristor-based accelerators could significantly advance the capabilities of AI hardware, particularly for edge applications where power efficiency is paramount.