# tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI

arXiv: https://arxiv.org/abs/2412.17966 · HTML: https://mlsanity.com/paper/2412.17966/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- Builds on 9 of its 20 references that are in the map.
- First posted on arXiv 23 Dec 2024.

## Builds on (most cited first, 9 of 9)

- [In-Datacenter Performance Analysis of a Tensor Processing Unit](https://mlsanity.com/paper/1704.04760/) (2017)
- [The Computational Limits of Deep Learning](https://mlsanity.com/paper/2007.05558/) (2020)
- [Edge AI: On-Demand Accelerating Deep Neural Network Inference via Edge Computing](https://mlsanity.com/paper/1910.05316/) (2019)
- [Convolutional Neural Networks using Logarithmic Data Representation](https://mlsanity.com/paper/1603.01025/) (2016)
- [AI Benchmark: Running Deep Neural Networks on Android Smartphones](https://mlsanity.com/paper/1810.01109/) (2018)
- [Systolic Tensor Array: An Efficient Structured-Sparse GEMM Accelerator for Mobile CNN Inference](https://mlsanity.com/paper/2005.08098/) (2020)
- [Mixed Low-precision Deep Learning Inference using Dynamic Fixed Point](https://mlsanity.com/paper/1701.08978/) (2017)
- [A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks](https://mlsanity.com/paper/2105.13262/) (2021)
- [Correlation Manipulating Circuits for Stochastic Computing](https://mlsanity.com/paper/1803.04862/) (2018)

## Built on by (most cited first, 2 of 2)

- [Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs](https://mlsanity.com/paper/2412.19002/) (2024)
- [Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators](https://mlsanity.com/paper/2602.00838/) (2026)

## Abstract (arXiv)

General matrix multiplication (GEMM) is a ubiquitous computing kernel/algorithm for data processing in diverse applications, including artificial intelligence (AI) and deep learning (DL). Recent shift towards edge computing has inspired GEMM architectures based on unary computing, which are predominantly stochastic and rate-coded systems. This paper proposes a novel GEMM architecture based on temporal-coding, called tuGEMM, that performs exact computation. We introduce two variants of tuGEMM, serial and parallel, with distinct area/power-latency trade-offs. Post-synthesis Power-Performance-Area (PPA) in 45 nm CMOS are reported for 2-bit, 4-bit, and 8-bit computations. The designs illustrate significant advantages in area-power efficiency over state-of-the-art stochastic unary systems especially at low precisions, e.g. incurring just 0.03 mm^2 and 9 mW for 4 bits, and 0.01 mm^2 and 4 mW for 2 bits. This makes tuGEMM ideal for power constrained mobile and edge devices performing always-on real-time sensory processing.