# Schemato -- An LLM for Netlist-to-Schematic Conversion

arXiv: https://arxiv.org/abs/2411.13899 · HTML: https://mlsanity.com/paper/2411.13899/

## Key facts

- Cited by 11 papers in the map (data through 14 Oct 2026).
- Builds on 12 of its 34 references that are in the map.
- First posted on arXiv 21 Nov 2024.

## Builds on (most cited first, 12 of 12)

- [GPT-4 Technical Report](https://mlsanity.com/paper/2303.08774/) (2023)
- [The Llama 3 Herd of Models](https://mlsanity.com/paper/2407.21783/) (2024)
- [Chain-of-Thought Prompting Elicits Reasoning in Large Language Models](https://mlsanity.com/paper/2201.11903/) (2022)
- [mixup: Beyond Empirical Risk Minimization](https://mlsanity.com/paper/1710.09412/) (2017)
- [PyTorch FSDP: Experiences on Scaling Fully Sharded Data Parallel](https://mlsanity.com/paper/2304.11277/) (2023)
- [CodeBLEU: a Method for Automatic Evaluation of Code Synthesis](https://mlsanity.com/paper/2009.10297/) (2020)
- [AnalogCoder: Analog Circuit Design via Training-Free Code Generation](https://mlsanity.com/paper/2405.14918/) (2024)
- [AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs](https://mlsanity.com/paper/2001.01808/) (2020)
- [ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models](https://mlsanity.com/paper/2406.18770/) (2024)
- [AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design](https://mlsanity.com/paper/2407.03891/) (2024)
- [LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits](https://mlsanity.com/paper/2407.18269/) (2024)
- [Domain Knowledge-Infused Deep Learning for Automated Analog/Radio-Frequency Circuit Parameter Optimization](https://mlsanity.com/paper/2204.12948/) (2022)

## Built on by (most cited first, 11 of 11)

- [HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimization](https://mlsanity.com/paper/2511.19669/) (2025)
- [CircuitLM: A Multi-Agent LLM-Aided Design Framework for Generating Circuit Schematics from Natural Language Prompts](https://mlsanity.com/paper/2601.04505/) (2026)
- [SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence](https://mlsanity.com/paper/2601.22114/) (2026)
- [GENIE-ASI: Generative Instruction and Executable Code for Analog Subcircuit Identification](https://mlsanity.com/paper/2508.19393/) (2025)
- [EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit](https://mlsanity.com/paper/2510.17002/) (2025)
- [SPICEMixer - Netlist-Level Circuit Evolution](https://mlsanity.com/paper/2506.01497/) (2025)
- [NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulation](https://mlsanity.com/paper/2608.12197/) (2026)
- [SchGen: PCB Schematic Generation with Semantic-Grounded Code Representations](https://mlsanity.com/paper/2605.30345/) (2026)
- [Surveying GenAI-based Automation in Printed Circuit Board Design and Test](https://mlsanity.com/paper/2606.17074/) (2026)
- [SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence](https://mlsanity.com/paper/2607.01609/) (2026)
- [Weave: Verified Netlist-to-Schematic Conversion via Layered Graph Layout](https://mlsanity.com/paper/2607.03835/) (2026)

## Abstract (arXiv)

Machine learning models are advancing circuit design, particularly in analog circuits. They typically generate netlists that lack human interpretability. This is a problem as human designers heavily rely on the interpretability of circuit diagrams or schematics to intuitively understand, troubleshoot, and develop designs. Hence, to integrate domain knowledge effectively, it is crucial to translate ML-generated netlists into interpretable schematics quickly and accurately. We propose Schemato, a large language model (LLM) for netlist-to-schematic conversion. In particular, we consider our approach in converting netlists to .asc files, text-based schematic description used in LTSpice. Experiments on our circuit dataset show that Schemato achieves up to 76% compilation success rate, surpassing 63% scored by the state-of-the-art LLMs. Furthermore, our experiments show that Schemato generates schematics with an average graph edit distance score and mean structural similarity index measure, scaled by the compilation success rate that are 1.8x and 4.3x higher than the best performing LLMs respectively, demonstrating its ability to generate schematics that are more accurately connected and are closer to the reference human design.