# LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits

arXiv: https://arxiv.org/abs/2411.12930 · HTML: https://mlsanity.com/paper/2411.12930/

## Key facts

- Cited by 22 papers in the map (data through 14 Oct 2026).
- Builds on 11 of its 27 references that are in the map.
- First posted on arXiv 19 Nov 2024.

## Builds on (most cited first, 11 of 11)

- [The Llama 3 Herd of Models](https://mlsanity.com/paper/2407.21783/) (2024)
- [Reflexion: Language Agents with Verbal Reinforcement Learning](https://mlsanity.com/paper/2303.11366/) (2023)
- [Scalable Global Optimization via Local Bayesian Optimization](https://mlsanity.com/paper/1910.01739/) (2019)
- [GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning](https://mlsanity.com/paper/2005.00406/) (2020)
- [AnalogCoder: Analog Circuit Design via Training-Free Code Generation](https://mlsanity.com/paper/2405.14918/) (2024)
- [AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs](https://mlsanity.com/paper/2001.01808/) (2020)
- [ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models](https://mlsanity.com/paper/2406.18770/) (2024)
- [AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting](https://mlsanity.com/paper/2409.14739/) (2024)
- [LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Design](https://mlsanity.com/paper/2406.18873/) (2024)
- [DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks](https://mlsanity.com/paper/2110.00211/) (2021)
- [LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generation](https://mlsanity.com/paper/2406.05250/) (2024)

## Built on by (most cited first, 22 of 22)

- [AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs](https://mlsanity.com/paper/2508.02518/) (2025)
- [EEsizer: LLM-Based AI Agent for Sizing of Analog and Mixed Signal Circuit](https://mlsanity.com/paper/2509.25510/) (2025)
- [iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs](https://mlsanity.com/paper/2505.22086/) (2025)
- [TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuits](https://mlsanity.com/paper/2509.14169/) (2025)
- [LLM-based AI Agent for Sizing of Analog and Mixed Signal Circuit](https://mlsanity.com/paper/2504.11497/) (2025)
- [HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimization](https://mlsanity.com/paper/2511.19669/) (2025)
- [AutoSizer: Automatic Sizing of Analog and Mixed-Signal Circuits via Large Language Model (LLM) Agents](https://mlsanity.com/paper/2602.02849/) (2026)
- [Evaluating LLM-based Workflows for Switched-Mode Power Supply Design](https://mlsanity.com/paper/2507.10639/) (2025)
- [Dataset Construction for Training LLM to Learn Analog Circuit Knowledge](https://mlsanity.com/paper/2508.10409/) (2025)
- [Can an Actor-Critic Optimization Framework Improve Analog Design?](https://mlsanity.com/paper/2603.24714/) (2026)
- [SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flows](https://mlsanity.com/paper/2607.03701/) (2026)
- [RF-Agent: A Practical Framework for Building Language Agents for RFIC Design](https://mlsanity.com/paper/2607.18772/) (2026)
- [VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizing](https://mlsanity.com/paper/2601.07315/) (2026)
- [LLM-Assisted Op-Amp Behavioral-Level Design via Agentic Human-Mimicking Reasoning](https://mlsanity.com/paper/2601.21321/) (2026)
- [A Self-Calibrating Framework for Analog Circuit Sizing Using LLM-Derived Analytical Equations](https://mlsanity.com/paper/2604.07387/) (2026)
- [Agentic Electronic Design Automation: A Handoff Perspective](https://mlsanity.com/paper/2606.19795/) (2026)
- [AutoVSR: Automatic Visual-to-Symbolic Reasoning for Symbolic Expression Generation from Circuit Schematic](https://mlsanity.com/paper/2607.11338/) (2026)
- [Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generation](https://mlsanity.com/paper/2607.14165/) (2026)
- [AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models](https://mlsanity.com/paper/2608.13472/) (2026)
- [Simulation-Aware In-Context Policy Improvement for LLM-Aided Analog Layout Refinement](https://mlsanity.com/paper/2608.13767/) (2026)
- [AgenticSizing: A Large Language Model-based Multi-Agent Framework for Analog Circuit Sizing](https://mlsanity.com/paper/2609.25873/) (2026)
- [Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Tasks](https://mlsanity.com/paper/2609.33356/) (2026)

## Abstract (arXiv)

Traditional approaches for designing analog circuits are time-consuming and require significant human expertise. Existing automation efforts using methods like Bayesian Optimization (BO) and Reinforcement Learning (RL) are sub-optimal and costly to generalize across different topologies and technology nodes. In our work, we introduce a novel approach, LEDRO, utilizing Large Language Models (LLMs) in conjunction with optimization techniques to iteratively refine the design space for analog circuit sizing. LEDRO is highly generalizable compared to other RL and BO baselines, eliminating the need for design annotation or model training for different topologies or technology nodes. We conduct a comprehensive evaluation of our proposed framework and baseline on 22 different Op-Amp topologies across four FinFET technology nodes. Results demonstrate the superior performance of LEDRO as it outperforms our best baseline by an average of 13% FoM improvement with 2.15x speed-up on low complexity Op-Amps and 48% FoM improvement with 1.7x speed-up on high complexity Op-Amps. This highlights LEDRO's effective performance, efficiency, and generalizability.