# A Review of SRAM-based Compute-in-Memory Circuits

arXiv: https://arxiv.org/abs/2411.06079 · HTML: https://mlsanity.com/paper/2411.06079/

## Key facts

- Cited by 5 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 9 Nov 2024.

## Built on by (most cited first, 5 of 5)

- [Harnessing Nonidealities in Analog In-Memory Computing Circuits: A Physical Modeling Approach for Neuromorphic Systems](https://mlsanity.com/paper/2412.09010/) (2024)
- [AIM: Software and Hardware Co-design for Architecture-level IR-drop Mitigation in High-performance PIM](https://mlsanity.com/paper/2511.04321/) (2025)
- [CQ-CiM: Hardware-Aware Embedding Shaping for Robust CiM-Based Retrieval](https://mlsanity.com/paper/2602.20083/) (2026)
- [OpenACMv2: An Accuracy-Constrained Co-Optimization Framework for Approximate DCiM](https://mlsanity.com/paper/2603.13042/) (2026)
- [CRAM-ER: Error-Resilient Spintronic Computational Random Access Memory for Scalable In-Memory Computation](https://mlsanity.com/paper/2606.02781/) (2026)

## Abstract (arXiv)

This paper presents a tutorial and review of SRAM-based Compute-in-Memory (CIM) circuits, with a focus on both Digital CIM (DCIM) and Analog CIM (ACIM) implementations. We explore the fundamental concepts, architectures, and operational principles of CIM technology. The review compares DCIM and ACIM approaches, examining their respective advantages and challenges. DCIM offers high computational precision and process scaling benefits, while ACIM provides superior power and area efficiency, particularly for medium-precision applications. We analyze various ACIM implementations, including current-based, time-based, and charge-based approaches, with a detailed look at charge-based ACIMs. The paper also discusses emerging hybrid CIM architectures that combine DCIM and ACIM to leverage the strengths of both approaches.