# Communication Characterization of AI Workloads for Large-scale Multi-chiplet Accelerators

arXiv: https://arxiv.org/abs/2410.22262 · HTML: https://mlsanity.com/paper/2410.22262/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 29 Oct 2024.

## Built on by (most cited first, 2 of 2)

- [Exploring the Potential of Wireless-enabled Multi-Chip AI Accelerators](https://mlsanity.com/paper/2501.17567/) (2025)
- [Taming the Tail: NoI Topology Synthesis for Mixed DL Workloads on Chiplet-Based Accelerators](https://mlsanity.com/paper/2510.24113/) (2025)

## Abstract (arXiv)

Next-generation artificial intelligence (AI) workloads are posing challenges of scalability and robustness in terms of execution time due to their intrinsic evolving data-intensive characteristics. In this paper, we aim to analyse the potential bottlenecks caused due to data movement characteristics of AI workloads on scale-out accelerator architectures composed of multiple chiplets. Our methodology captures the unicast and multicast communication traffic of a set of AI workloads and assesses aspects such as the time spent in such communications and the amount of multicast messages as a function of the number of employed chiplets. Our studies reveal that some AI workloads are potentially vulnerable to the dominant effects of communication, especially multicast traffic, which can become a performance bottleneck and limit their scalability. Workload profiling insights suggest to architect a flexible interconnect solution at chiplet level in order to improve the performance, efficiency and scalability of next-generation AI accelerators.