# Efficient Reprogramming of Memristive Crossbars for DNNs: Weight Sorting and Bit Stucking

arXiv: https://arxiv.org/abs/2410.21730 · HTML: https://mlsanity.com/paper/2410.21730/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- Builds on 7 of its 26 references that are in the map.
- First posted on arXiv 29 Oct 2024.

## Builds on (most cited first, 7 of 7)

- [Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Coding](https://mlsanity.com/paper/1510.00149/) (2015)
- [Pruning and Quantization for Deep Neural Network Acceleration: A Survey](https://mlsanity.com/paper/2101.09671/) (2021)
- [Post-Training Piecewise Linear Quantization for Deep Neural Networks](https://mlsanity.com/paper/2002.00104/) (2020)
- [Layer-Wise Data-Free CNN Compression](https://mlsanity.com/paper/2011.09058/) (2020)
- [Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array](https://mlsanity.com/paper/1406.4951/) (2014)
- [Sorted Weight Sectioning for Energy-Efficient Unstructured Sparse DNNs on Compute-in-Memory Crossbars](https://mlsanity.com/paper/2410.11298/) (2024)
- [Analog Feedback-Controlled Memristor programming Circuit for analog Content Addressable Memory](https://mlsanity.com/paper/2304.11030/) (2023)

## Built on by (most cited first, 2 of 2)

- [OpenMENA: An Open-Source Memristor Interfacing and Compute Board for Neuromorphic Edge-AI Applications](https://mlsanity.com/paper/2511.03747/) (2025)
- [MDM: Manhattan Distance Mapping of DNN Weights for Parasitic-Resistance-Resilient Memristive Crossbars](https://mlsanity.com/paper/2511.04798/) (2025)

## Abstract (arXiv)

We introduce a novel approach to reduce the number of times required for reprogramming memristors on bit-sliced compute-in-memory crossbars for deep neural networks (DNNs). Our idea addresses the limited non-volatile memory endurance, which restrict the number of times they can be reprogrammed. To reduce reprogramming demands, we employ two techniques: (1) we organize weights into sorted sections to schedule reprogramming of similar crossbars, maximizing memristor state reuse, and (2) we reprogram only a fraction of randomly selected memristors in low-order columns, leveraging their bit-level distribution and recognizing their relatively small impact on model accuracy. We evaluate our approach for state-of-the-art models on the ImageNet-1K dataset. We demonstrate a substantial reduction in crossbar reprogramming by 3.7x for ResNet-50 and 21x for ViT-Base, while maintaining model accuracy within a 1% margin.