# DSP-MLIR: A MLIR Dialect for Digital Signal Processing

arXiv: https://arxiv.org/abs/2408.11205 · HTML: https://mlsanity.com/paper/2408.11205/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 5 of its 42 references that are in the map.
- First posted on arXiv 20 Aug 2024.

## Builds on (most cited first, 5 of 5)

- [MLIR: A Compiler Infrastructure for the End of Moore's Law](https://mlsanity.com/paper/2002.11054/) (2020)
- [ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation](https://mlsanity.com/paper/2107.11673/) (2021)
- [Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing](https://mlsanity.com/paper/2305.08415/) (2023)
- [A MLIR Dialect for Quantum Assembly Languages](https://mlsanity.com/paper/2101.11365/) (2021)
- [TPU-MLIR: A Compiler For TPU Using MLIR](https://mlsanity.com/paper/2210.15016/) (2022)

## Built on by (most cited first, 1 of 1)

- [Bootstrapping Fuzzers for Compilers of Low-Resource Language Dialects Using Language Models](https://mlsanity.com/paper/2512.05887/) (2025)

## Abstract (arXiv)

Traditional Digital Signal Processing ( DSP ) compilers work at low level ( C-level / assembly level ) and hence lose much of the optimization opportunities present at high-level ( domain-level ). The emerging multi-level compiler infrastructure MLIR ( Multi-level Intermediate Representation ) allows to specify optimizations at higher level. In this paper, we utilize MLIR framework to introduce a DSP Dialect and perform domain-specific optimizations at dialect -level ( high-level ) and show the usefulness of these optimizations on sample DSP apps. In particular, we develop a compiler for DSP and a DSL (Domain Specific Language) to ease the development of apps. We show the performance improvement in execution time for these sample apps by upto 10x which would have been difficult if the IR were at C/ affine level.