# Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits

arXiv: https://arxiv.org/abs/2406.19667 · HTML: https://mlsanity.com/paper/2406.19667/

## Key facts

- Cited by 4 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 28 Jun 2024.

## Built on by (most cited first, 4 of 4)

- [Unsupervised local learning based on voltage-dependent synaptic plasticity for resistive and ferroelectric synapses](https://mlsanity.com/paper/2510.25787/) (2025)
- [Personalized Spiking Neural Networks with Ferroelectric Synapses for EEG Signal Processing](https://mlsanity.com/paper/2601.00020/) (2025)
- [Large Language Models with At Most One Spike per Neuron](https://mlsanity.com/paper/2609.05151/) (2026)
- [A Time-Based Readout for Vector-Matrix Multiplication in Fully Analog Memristive SNNs](https://mlsanity.com/paper/2609.11713/) (2026)

## Abstract (arXiv)

Heterogeneous systems with analog CMOS circuits integrated with nanoscale memristive devices enable efficient deployment of neural networks on neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal dynamics by operating with extremely low current levels. Nevertheless, the current read from the memristive synapses can be higher by several orders of magnitude, and performing impedance matching between neurons and synapses is mandatory. In this paper, we implement an analog leaky integrate and fire (LIF) neuron with a voltage regulator and current attenuator for interfacing CMOS neurons with memristive synapses. In addition, the neuron design proposes a dual leakage that could enable the implementation of local learning rules such as voltage-dependent synaptic plasticity. We also propose a connection scheme to implement adaptive LIF neurons based on two-neuron interaction. The proposed circuits can be used to interface with a variety of synaptic devices and process signals of diverse temporal dynamics.
