# Efficient Stimuli Generation using Reinforcement Learning in Design Verification

arXiv: https://arxiv.org/abs/2405.19815 · HTML: https://mlsanity.com/paper/2405.19815/

## Key facts

- Cited by 5 papers in the map (data through 14 Oct 2026).
- Placed in RL for energy, networks and operations, one of 15 directions in Deep reinforcement learning methods.
- Builds on 4 of its 22 references that are in the map.
- First posted on arXiv 30 May 2024.

## Placed in

- Deep reinforcement learning methods / [RL for energy, networks and operations](https://mlsanity.com/deeprl/rl-for-energy-networks-and-operations/)

## Builds on (most cited first, 4 of 4)

- [Optimizing Design Verification using Machine Learning: Doing better than Random](https://mlsanity.com/paper/1909.13168/) (2019)
- [Using Neural Networks for Novelty-based Test Selection to Accelerate Functional Coverage Closure](https://mlsanity.com/paper/2207.00445/) (2022)
- [Optimising Design Verification Using Machine Learning: An Open Source Solution](https://mlsanity.com/paper/2012.02453/) (2020)
- [VeRLPy: Python Library for Verification of Digital Designs with Reinforcement Learning](https://mlsanity.com/paper/2108.03978/) (2021)

## Built on by (most cited first, 5 of 5)

- [HAVEN: Hybrid Automated Verification ENgine for UVM Testbench Synthesis with LLMs](https://mlsanity.com/paper/2604.27643/) (2026)
- [Review of Machine Learning for Micro-Electronic Design Verification](https://mlsanity.com/paper/2503.11687/) (2025)
- [Optimizing Coverage-Driven Verification Using Machine Learning and PyUVM: A Novel Approach](https://mlsanity.com/paper/2503.11666/) (2025)
- [RIFT: A Scalable Methodology for LLM Accelerator Fault Assessment using Reinforcement Learning](https://mlsanity.com/paper/2512.09829/) (2025)
- [Formal-Verification-Guided Bayesian Optimization for Non-Intrusive Last-Mile Coverage Closure](https://mlsanity.com/paper/2610.17449/) (2026)

## Abstract (arXiv)

The increasing design complexity of System-on-Chips (SoCs) has led to significant verification challenges, particularly in meeting coverage targets within a timely manner. At present, coverage closure is heavily dependent on constrained random and coverage driven verification methodologies where the randomized stimuli are bounded to verify certain scenarios and to reach coverage goals. This process is said to be exhaustive and to consume a lot of project time. In this paper, a novel methodology is proposed to generate efficient stimuli with the help of Reinforcement Learning (RL) to reach the maximum code coverage of the Design Under Verification (DUV). Additionally, an automated framework is created using metamodeling to generate a SystemVerilog testbench and an RL environment for any given design. The proposed approach is applied to various designs and the produced results proves that the RL agent provides effective stimuli to achieve code coverage faster in comparison with baseline random simulations. Furthermore, various RL agents and reward schemes are analyzed in our work.