# HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond

arXiv: https://arxiv.org/abs/2405.00820 · HTML: https://mlsanity.com/paper/2405.00820/

## Key facts

- Cited by 8 papers in the map (data through 14 Oct 2026).
- Builds on 16 of its 41 references that are in the map.
- First posted on arXiv 1 May 2024.

## Builds on (most cited first, 16 of 16)

- [Understanding How Dimension Reduction Tools Work: An Empirical Approach to Deciphering t-SNE, UMAP, TriMAP, and PaCMAP for Data Visualization](https://mlsanity.com/paper/2012.04456/) (2020)
- [SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems](https://mlsanity.com/paper/1909.09709/) (2019)
- [IronMan: GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning](https://mlsanity.com/paper/2102.08138/) (2021)
- [AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators](https://mlsanity.com/paper/2009.14381/) (2020)
- [Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts](https://mlsanity.com/paper/2305.18691/) (2023)
- [Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design](https://mlsanity.com/paper/1907.12952/) (2019)
- [FlowGNN: A Dataflow Architecture for Real-Time Workload-Agnostic Graph Neural Network Inference](https://mlsanity.com/paper/2204.13103/) (2022)
- [MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification](https://mlsanity.com/paper/2012.10597/) (2020)
- [PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs](https://mlsanity.com/paper/2201.10114/) (2022)
- [Parallel Programming for FPGAs](https://mlsanity.com/paper/1805.03648/) (2018)
- [HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis](https://mlsanity.com/paper/2009.00871/) (2020)
- [DB4HLS: A Database of High-Level Synthesis Design Space Explorations](https://mlsanity.com/paper/2101.00587/) (2021)
- [HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis](https://mlsanity.com/paper/2302.10977/) (2023)
- [DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference](https://mlsanity.com/paper/2304.06831/) (2023)
- [LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis](https://mlsanity.com/paper/2304.11219/) (2023)
- [LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learning](https://mlsanity.com/paper/2208.10606/) (2022)

## Built on by (most cited first, 8 of 8)

- [HLS-Eval: A Benchmark and Framework for Evaluating LLMs on High-Level Synthesis Design Tasks](https://mlsanity.com/paper/2504.12268/) (2025)
- [wa-hls4ml: A Benchmark and Surrogate Models for hls4ml Resource and Latency Estimation](https://mlsanity.com/paper/2511.05615/) (2025)
- [AgRefactor: Self-Evolving Agentic Workflow for HLS Compatibility and Performance](https://mlsanity.com/paper/2606.30949/) (2026)
- [ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis](https://mlsanity.com/paper/2507.03255/) (2025)
- [Iceberg: Enhancing HLS Modeling with Synthetic Data](https://mlsanity.com/paper/2507.09948/) (2025)
- [HLSmith: An Expert-Guided Agentic Framework for C/C++-to-HLS Translation](https://mlsanity.com/paper/2608.06791/) (2026)
- [HLSFactory-Agent: Large-Scale Agentic HLS Dataset Construction from Academic and Open-Source Projects](https://mlsanity.com/paper/2609.09519/) (2026)
- [SyntheticHLS: Building Diverse Synthetic High-Level Synthesis Datasets using LLMs](https://mlsanity.com/paper/2610.00106/) (2026)

## Abstract (arXiv)

Machine learning (ML) techniques have been applied to high-level synthesis (HLS) flows for quality-of-result (QoR) prediction and design space exploration (DSE). Nevertheless, the scarcity of accessible high-quality HLS datasets and the complexity of building such datasets present challenges. Existing datasets have limitations in terms of benchmark coverage, design space enumeration, vendor extensibility, or lack of reproducible and extensible software for dataset construction. Many works also lack user-friendly ways to add more designs, limiting wider adoption of such datasets. In response to these challenges, we introduce HLSFactory, a comprehensive framework designed to facilitate the curation and generation of high-quality HLS design datasets. HLSFactory has three main stages: 1) a design space expansion stage to elaborate single HLS designs into large design spaces using various optimization directives across multiple vendor tools, 2) a design synthesis stage to execute HLS and FPGA tool flows concurrently across designs, and 3) a data aggregation stage for extracting standardized data into packaged datasets for ML usage. This tripartite architecture ensures broad design space coverage via design space expansion and supports multiple vendor tools. Users can contribute to each stage with their own HLS designs and synthesis results and extend the framework itself with custom frontends and tool flows. We also include an initial set of built-in designs from common HLS benchmarks curated open-source HLS designs. We showcase the versatility and multi-functionality of our framework through seven case studies: I) ML model for QoR prediction; II) Design space sampling; III) Fine-grained parallelism backend speedup; IV) Targeting Intel's HLS flow; V) Adding new auxiliary designs; VI) Integrating published HLS data; VII) HLS tool version regression benchmarking.