# SpikeExplorer: hardware-oriented Design Space Exploration for Spiking Neural Networks on FPGA

arXiv: https://arxiv.org/abs/2404.03714 · HTML: https://mlsanity.com/paper/2404.03714/

## Key facts

- Cited by 3 papers in the map (data through 14 Oct 2026).
- Builds on 17 of its 47 references that are in the map.
- First posted on arXiv 4 Apr 2024.

## Builds on (most cited first, 17 of 17)

- [Surrogate Gradient Learning in Spiking Neural Networks](https://mlsanity.com/paper/1901.09948/) (2019)
- [Training Spiking Neural Networks Using Lessons From Deep Learning](https://mlsanity.com/paper/2109.12894/) (2021)
- [From Words to Watts: Benchmarking the Energy Costs of Large Language Model Inference](https://mlsanity.com/paper/2310.03003/) (2023)
- [The Heidelberg spiking datasets for the systematic evaluation of spiking neural networks](https://mlsanity.com/paper/1910.07407/) (2019)
- [Neural Architecture Search for Spiking Neural Networks](https://mlsanity.com/paper/2201.10355/) (2022)
- [A scalable multi-core architecture with heterogeneous memory structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)](https://mlsanity.com/paper/1708.04198/) (2017)
- [Q-SpiNN: A Framework for Quantizing Spiking Neural Networks](https://mlsanity.com/paper/2107.01807/) (2021)
- [Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions](https://mlsanity.com/paper/2203.07006/) (2022)
- [Spiking Neural Networks Hardware Implementations and Challenges: a Survey](https://mlsanity.com/paper/2005.01467/) (2020)
- [Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge](https://mlsanity.com/paper/2401.01141/) (2024)
- [E3NE: An End-to-End Framework for Accelerating Spiking Neural Networks with Emerging Neural Encoding on FPGAs](https://mlsanity.com/paper/2111.10027/) (2021)
- [Spiker: an FPGA-optimized Hardware acceleration for Spiking Neural Networks](https://mlsanity.com/paper/2201.06993/) (2022)
- [Design Space Exploration of Hardware Spiking Neurons for Embedded Artificial Intelligence](https://mlsanity.com/paper/1910.01010/) (2019)
- [A Survey of Spiking Neural Network Accelerator on FPGA](https://mlsanity.com/paper/2307.03910/) (2023)
- [FPGA Implementation of Simplified Spiking Neural Network](https://mlsanity.com/paper/2010.01200/) (2020)
- [NeuroXplorer 1.0: An Extensible Framework for Architectural Exploration with Spiking Neural Networks](https://mlsanity.com/paper/2105.01795/) (2021)
- [Design Space Exploration of Approximate Computing Techniques with a Reinforcement Learning Approach](https://mlsanity.com/paper/2312.17525/) (2023)

## Built on by (most cited first, 3 of 3)

- [Energy-Efficient Digital Design: A Comparative Study of Event-Driven and Clock-Driven Spiking Neurons](https://mlsanity.com/paper/2506.13268/) (2025)
- [SFATTI: Spiking FPGA Accelerator for Temporal Task-driven Inference -- A Case Study on MNIST](https://mlsanity.com/paper/2507.10561/) (2025)
- [Spiking Brain Compression: Post-Training Second-order Compression for Spiking Neural Networks](https://mlsanity.com/paper/2506.03996/) (2025)

## Abstract (arXiv)

One of today's main concerns is to bring Artificial Intelligence power to embedded systems for edge applications. The hardware resources and power consumption required by state-of-the-art models are incompatible with the constrained environments observed in edge systems, such as IoT nodes and wearable devices. Spiking Neural Networks (SNNs) can represent a solution in this sense: inspired by neuroscience, they reach unparalleled power and resource efficiency when run on dedicated hardware accelerators. However, when designing such accelerators, the amount of choices that can be taken is huge. This paper presents SpikExplorer, a modular and flexible Python tool for hardware-oriented Automatic Design Space Exploration to automate the configuration of FPGA accelerators for SNNs. Using Bayesian optimizations, SpikerExplorer enables hardware-centric multi-objective optimization, supporting factors such as accuracy, area, latency, power, and various combinations during the exploration process. The tool searches the optimal network architecture, neuron model, and internal and training parameters, trying to reach the desired constraints imposed by the user. It allows for a straightforward network configuration, providing the full set of explored points for the user to pick the trade-off that best fits the needs. The potential of SpikExplorer is showcased using three benchmark datasets. It reaches 95.8% accuracy on the MNIST dataset, with a power consumption of 180mW/image and a latency of 0.12 ms/image, making it a powerful tool for automatically optimizing SNNs.