# Mapping Image Transformations Onto Pixel Processor Arrays

arXiv: https://arxiv.org/abs/2403.16994 · HTML: https://mlsanity.com/paper/2403.16994/

## Key facts

- No citing papers in the map yet (data through 14 Oct 2026).
- Builds on 1 of its 16 references that are in the map.
- First posted on arXiv 25 Mar 2024.

## Builds on (most cited first, 1 of 1)

- [A Camera That CNNs: Towards Embedded Neural Networks on Pixel Processor Arrays](https://mlsanity.com/paper/1909.05647/) (2019)

## Abstract (arXiv)

Pixel Processor Arrays (PPA) present a new vision sensor/processor architecture consisting of a SIMD array of processor elements, each capable of light capture, storage, processing and local communication. Such a device allows visual data to be efficiently stored and manipulated directly upon the focal plane, but also demands the invention of new approaches and algorithms, suitable for the massively-parallel fine-grain processor arrays. In this paper we demonstrate how various image transformations, including shearing, rotation and scaling, can be performed directly upon a PPA. The implementation details are presented using the SCAMP-5 vision chip, that contains a 256x256 pixel-parallel array. Our approaches for performing the image transformations efficiently exploit the parallel computation in a cellular processor array, minimizing the number of SIMD instructions required. These fundamental image transformations are vital building blocks for many visual tasks. This paper aims to serve as a reference for future PPA research while demonstrating the flexibility of PPA architectures.