# SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators

arXiv: https://arxiv.org/abs/2403.02946 · HTML: https://mlsanity.com/paper/2403.02946/

## Key facts

- Cited by 5 papers in the map (data through 14 Oct 2026).
- Builds on 7 of its 32 references that are in the map.
- First posted on arXiv 5 Mar 2024.

## Builds on (most cited first, 7 of 7)

- [A Systematic Literature Review on Hardware Reliability Assessment Methods for Deep Neural Networks](https://mlsanity.com/paper/2305.05750/) (2023)
- [DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators](https://mlsanity.com/paper/2303.08226/) (2023)
- [Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators](https://mlsanity.com/paper/2401.09509/) (2024)
- [APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors](https://mlsanity.com/paper/2305.19733/) (2023)
- [Special Session: Approximation and Fault Resiliency of DNN Accelerators](https://mlsanity.com/paper/2306.04645/) (2023)
- [Caffe con Troll: Shallow Ideas to Speed Up Deep Learning](https://mlsanity.com/paper/1504.04343/) (2015)
- [iFDK: A Scalable Framework for Instant High-resolution Image Reconstruction](https://mlsanity.com/paper/1909.02724/) (2019)

## Built on by (most cited first, 5 of 5)

- [DeepVigor+: Scalable and Accurate Semi-Analytical Fault Resilience Analysis for Deep Neural Network](https://mlsanity.com/paper/2410.15742/) (2024)
- [FORTALESA: Fault-Tolerant Reconfigurable Systolic Array for DNN Inference](https://mlsanity.com/paper/2503.04426/) (2025)
- [PhD Thesis Summary: Methods for Reliability Assessment and Enhancement of Deep Neural Network Hardware Accelerators](https://mlsanity.com/paper/2603.08724/) (2026)
- [FLARE: One-Shot PE-Level Fault Localization in Systolic Arrays via Algebraic Test Vectors](https://mlsanity.com/paper/2605.08594/) (2026)
- [BLADE: ReliaBle Dynamic Hardware-Aware SNN-ANN Boundary SeLection for Event-BAseD Object DEtection](https://mlsanity.com/paper/2609.17562/) (2026)

## Abstract (arXiv)

Systolic array has emerged as a prominent architecture for Deep Neural Network (DNN) hardware accelerators, providing high-throughput and low-latency performance essential for deploying DNNs across diverse applications. However, when used in safety-critical applications, reliability assessment is mandatory to guarantee the correct behavior of DNN accelerators. While fault injection stands out as a well-established practical and robust method for reliability assessment, it is still a very time-consuming process. This paper addresses the time efficiency issue by introducing a novel hierarchical software-based hardware-aware fault injection strategy tailored for systolic array-based DNN accelerators.