# A Deep-Learning Technique to Locate Cryptographic Operations in Side-Channel Traces

arXiv: https://arxiv.org/abs/2402.19037 · HTML: https://mlsanity.com/paper/2402.19037/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- Builds on 2 of its 24 references that are in the map.
- First posted on arXiv 29 Feb 2024.

## Builds on (most cited first, 2 of 2)

- [Adam: A Method for Stochastic Optimization](https://mlsanity.com/paper/1412.6980/) (2014)
- [Batch Normalization: Accelerating Deep Network Training by Reducing Internal Covariate Shift](https://mlsanity.com/paper/1502.03167/) (2015)

## Built on by (most cited first, 2 of 2)

- [Inspector: Conversational and Lightweight Analyzer of Analog Circuit Layouts Using LLM and CNNs](https://mlsanity.com/paper/2609.34976/) (2026)
- [THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layout](https://mlsanity.com/paper/2609.35035/) (2026)

## Abstract (arXiv)

Side-channel attacks allow extracting secret information from the execution of cryptographic primitives by correlating the partially known computed data and the measured side-channel signal. However, to set up a successful side-channel attack, the attacker has to perform i) the challenging task of locating the time instant in which the target cryptographic primitive is executed inside a side-channel trace and then ii)the time-alignment of the measured data on that time instant. This paper presents a novel deep-learning technique to locate the time instant in which the target computed cryptographic operations are executed in the side-channel trace. In contrast to state-of-the-art solutions, the proposed methodology works even in the presence of trace deformations obtained through random delay insertion techniques. We validated our proposal through a successful attack against a variety of unprotected and protected cryptographic primitives that have been executed on an FPGA-implemented system-on-chip featuring a RISC-V CPU.