# Subgraph Extraction-based Feedback-guided Iterative Scheduling for HLS

arXiv: https://arxiv.org/abs/2401.12343 · HTML: https://mlsanity.com/paper/2401.12343/

## Key facts

- Cited by 1 papers in the map (data through 14 Oct 2026).
- Builds on 0 of its 16 references that are in the map.
- First posted on arXiv 22 Jan 2024.

## Built on by (most cited first, 1 of 1)

- [SkyEgg: Heterogeneity-Aware Hardware Synthesis via Equality Saturation](https://mlsanity.com/paper/2511.15323/) (2025)

## Abstract (arXiv)

This paper proposes ISDC, a novel feedback-guided iterative system of difference constraints (SDC) scheduling algorithm for high-level synthesis (HLS). ISDC leverages subgraph extraction-based low-level feedback from downstream tools like logic synthesizers to iteratively refine HLS scheduling. Technical innovations include: (1) An enhanced SDC formulation that effectively integrates low-level feedback into the linear-programming (LP) problem; (2) A fanout and window-based subgraph extraction mechanism driving the feedback cycle; (3) A no-human-in-loop ISDC flow compatible with a wide range of downstream tools and process design kits (PDKs). Evaluation shows that ISDC reduces register usage by 28.5% against an industrial-strength open-source HLS tool.