# MicroNAS: Zero-Shot Neural Architecture Search for MCUs

arXiv: https://arxiv.org/abs/2401.08996 · HTML: https://mlsanity.com/paper/2401.08996/

## Key facts

- Cited by 5 papers in the map (data through 14 Oct 2026).
- Builds on 5 of its 7 references that are in the map.
- First posted on arXiv 17 Jan 2024.

## Builds on (most cited first, 5 of 5)

- [NAS-Bench-201: Extending the Scope of Reproducible Neural Architecture Search](https://mlsanity.com/paper/2001.00326/) (2020)
- [MCUNet: Tiny Deep Learning on IoT Devices](https://mlsanity.com/paper/2007.10319/) (2020)
- [Neural Architecture Search on ImageNet in Four GPU Hours: A Theoretically Inspired Perspective](https://mlsanity.com/paper/2102.11535/) (2021)
- [μNAS: Constrained Neural Architecture Search for Microcontrollers](https://mlsanity.com/paper/2010.14246/) (2020)
- [On the Number of Linear Regions of Convolutional Neural Networks](https://mlsanity.com/paper/2006.00978/) (2020)

## Built on by (most cited first, 5 of 5)

- [MONAS: Efficient Zero-Shot Neural Architecture Search for MCUs](https://mlsanity.com/paper/2408.15034/) (2024)
- [Guidelines for the Quality Assessment of Energy-Aware NAS Benchmarks](https://mlsanity.com/paper/2505.15631/) (2025)
- [FASQ: Flexible Accelerated Subspace Quantization for Calibration-Free LLM Compression](https://mlsanity.com/paper/2605.04084/) (2026)
- [Design-Time Optimization of Deep Neural Networks for Intermittent Learning on Microcontrollers](https://mlsanity.com/paper/2608.03589/) (2026)
- [ENAS: An Efficient Hardware-Aware Neural Architecture Search Framework for TinyML on Resource-Constrained Microcontrollers](https://mlsanity.com/paper/2609.30272/) (2026)

## Abstract (arXiv)

Neural Architecture Search (NAS) effectively discovers new Convolutional Neural Network (CNN) architectures, particularly for accuracy optimization. However, prior approaches often require resource-intensive training on super networks or extensive architecture evaluations, limiting practical applications. To address these challenges, we propose MicroNAS, a hardware-aware zero-shot NAS framework designed for microcontroller units (MCUs) in edge computing. MicroNAS considers target hardware optimality during the search, utilizing specialized performance indicators to identify optimal neural architectures without high computational costs. Compared to previous works, MicroNAS achieves up to 1104x improvement in search efficiency and discovers models with over 3.23x faster MCU inference while maintaining similar accuracy