# Are SNNs Truly Energy-efficient? - A Hardware Perspective

arXiv: https://arxiv.org/abs/2309.03388 · HTML: https://mlsanity.com/paper/2309.03388/

## Key facts

- Cited by 6 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 6 Sep 2023.

## Built on by (most cited first, 6 of 6)

- [Reconsidering the Energy Efficiency of Spiking Neural Networks Inference from Analytical Perspectives](https://mlsanity.com/paper/2409.08290/) (2024)
- [SparrowSNN: A Hardware/software Co-design for Energy Efficient ECG Classification](https://mlsanity.com/paper/2406.06543/) (2024)
- [SpikeX: Exploring Accelerator Architecture and Network-Hardware Co-Optimization for Sparse Spiking Neural Networks](https://mlsanity.com/paper/2505.12292/) (2025)
- [Toward Efficient Deep Spiking Neuron Networks:A Survey On Compression](https://mlsanity.com/paper/2407.08744/) (2024)
- [Optimization of Low-Latency Spiking Neural Networks Utilizing Historical Dynamics of Refractory Periods](https://mlsanity.com/paper/2507.02960/) (2025)
- [Towards an Expressivity-Normalized Energy-Demand Comparison of ANNs and SNNs](https://mlsanity.com/paper/2608.29869/) (2026)

## Abstract (arXiv)

Spiking Neural Networks (SNNs) have gained attention for their energy-efficient machine learning capabilities, utilizing bio-inspired activation functions and sparse binary spike-data representations. While recent SNN algorithmic advances achieve high accuracy on large-scale computer vision tasks, their energy-efficiency claims rely on certain impractical estimation metrics. This work studies two hardware benchmarking platforms for large-scale SNN inference, namely SATA and SpikeSim. SATA is a sparsity-aware systolic-array accelerator, while SpikeSim evaluates SNNs implemented on In-Memory Computing (IMC) based analog crossbars. Using these tools, we find that the actual energy-efficiency improvements of recent SNN algorithmic works differ significantly from their estimated values due to various hardware bottlenecks. We identify and address key roadblocks to efficient SNN deployment on hardware, including repeated computations & data movements over timesteps, neuronal module overhead, and vulnerability of SNNs towards crossbar non-idealities.