# DeepFire2: A Convolutional Spiking Neural Network Accelerator on FPGAs

arXiv: https://arxiv.org/abs/2305.05187 · HTML: https://mlsanity.com/paper/2305.05187/

## Key facts

- Cited by 4 papers in the map (data through 14 Oct 2026).
- Builds on 11 of its 49 references that are in the map.
- First posted on arXiv 9 May 2023.

## Builds on (most cited first, 11 of 11)

- [SLAYER: Spike Layer Error Reassignment in Time](https://mlsanity.com/paper/1810.08646/) (2018)
- [Going Deeper in Spiking Neural Networks: VGG and Residual Architectures](https://mlsanity.com/paper/1802.02627/) (2018)
- [FINN: A Framework for Fast, Scalable Binarized Neural Network Inference](https://mlsanity.com/paper/1612.07119/) (2016)
- [RMP-SNN: Residual Membrane Potential Neuron for Enabling Deeper High-Accuracy and Low-Latency Spiking Neural Network](https://mlsanity.com/paper/2003.01811/) (2020)
- [A Free Lunch From ANN: Towards Efficient, Accurate Spiking Neural Networks Calibration](https://mlsanity.com/paper/2106.06984/) (2021)
- [Convolutional Networks for Fast, Energy-Efficient Neuromorphic Computing](https://mlsanity.com/paper/1603.08270/) (2016)
- [Benchmarking Keyword Spotting Efficiency on Neuromorphic Hardware](https://mlsanity.com/paper/1812.01739/) (2018)
- [Efficient Spiking Neural Networks with Radix Encoding](https://mlsanity.com/paper/2105.06943/) (2021)
- [E3NE: An End-to-End Framework for Accelerating Spiking Neural Networks with Emerging Neural Encoding on FPGAs](https://mlsanity.com/paper/2111.10027/) (2021)
- [A Design Flow for Mapping Spiking Neural Networks to Many-Core Neuromorphic Hardware](https://mlsanity.com/paper/2108.12444/) (2021)
- [A Resource-efficient Spiking Neural Network Accelerator Supporting Emerging Neural Encoding](https://mlsanity.com/paper/2206.02495/) (2022)

## Built on by (most cited first, 4 of 4)

- [Spiking Neural Network inference on FPGAs with hls4ml](https://mlsanity.com/paper/2606.10008/) (2026)
- [Exploring the Sparsity-Quantization Interplay on a Novel Hybrid SNN Event-Driven Architecture](https://mlsanity.com/paper/2411.15409/) (2024)
- [Architectural Design and Performance Analysis of FPGA based AI Accelerators: A Comprehensive Review](https://mlsanity.com/paper/2603.08740/) (2026)
- [Syn2Logic: End-to-End Neuromorphic Design Automation](https://mlsanity.com/paper/2608.25536/) (2026)

## Abstract (arXiv)

Brain-inspired spiking neural networks (SNNs) replace the multiply-accumulate operations of traditional neural networks by integrate-and-fire neurons, with the goal of achieving greater energy efficiency. Specialized hardware implementations of those neurons clearly have advantages over general-purpose devices in terms of power and performance, but exhibit poor scalability when it comes to accelerating large neural networks. DeepFire2 introduces a hardware architecture which can map large network layers efficiently across multiple super logic regions in a multi-die FPGA. That gives more control over resource allocation and parallelism, benefiting both throughput and energy consumption. Avoiding the use of lookup tables to implement the AND operations of an SNN, prevents the layer size to be limited by logic resources. A deep pipeline does not only lead to an increased clock speed of up to 600 MHz. We double the throughput and power efficiency compared to our previous version of DeepFire, which equates to an almost 10-fold improvement over other previous implementations. Importantly, we are able to deploy a large ImageNet model, while maintaining a throughput of over 1500 frames per second.