# Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks

arXiv: https://arxiv.org/abs/2303.08256 · HTML: https://mlsanity.com/paper/2303.08256/

## Key facts

- Cited by 27 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 14 Mar 2023.

## Built on by (most cited first, 27 of 27)

- [DeepGate3: Towards Scalable Circuit Representation Learning](https://mlsanity.com/paper/2407.11095/) (2024)
- [DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale](https://mlsanity.com/paper/2502.01681/) (2025)
- [NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph](https://mlsanity.com/paper/2504.09260/) (2025)
- [Differentiable Combinatorial Scheduling at Scale](https://mlsanity.com/paper/2406.06593/) (2024)
- [Verilog-to-PyG -- A Framework for Graph Learning and Augmentation on RTL Designs](https://mlsanity.com/paper/2311.05722/) (2023)
- [DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations](https://mlsanity.com/paper/2411.00530/) (2024)
- [Accelerating Exact Combinatorial Optimization via RL-based Initialization -- A Case Study in Scheduling](https://mlsanity.com/paper/2308.11652/) (2023)
- [OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine Learning Tasks in Logic Synthesis](https://mlsanity.com/paper/2411.09422/) (2024)
- [DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learning](https://mlsanity.com/paper/2502.06816/) (2025)
- [BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation](https://mlsanity.com/paper/2401.10753/) (2024)
- [Graph Learning at Scale: Characterizing and Optimizing Pre-Propagation GNNs](https://mlsanity.com/paper/2504.13266/) (2025)
- [e-boost: Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving](https://mlsanity.com/paper/2508.13020/) (2025)
- [A Benchmark on Directed Graph Representation Learning in Hardware Designs](https://mlsanity.com/paper/2410.06460/) (2024)
- [GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment](https://mlsanity.com/paper/2504.09485/) (2025)
- [Functional Matching of Logic Subgraphs: Beyond Structural Isomorphism](https://mlsanity.com/paper/2505.21988/) (2025)
- [FuncGNN: Learning Functional Semantics of Logic Circuits with Graph Neural Networks](https://mlsanity.com/paper/2506.06787/) (2025)
- [Alignment Unlocks Complementarity: A Framework for Multiview Circuit Representation Learning](https://mlsanity.com/paper/2509.20968/) (2025)
- [GROOT: Graph Edge Re-growth and Partitioning for the Verification of Large Designs in Logic Synthesis](https://mlsanity.com/paper/2511.18297/) (2025)
- [Report for NSF Workshop on AI for Electronic Design Automation](https://mlsanity.com/paper/2601.14541/) (2026)
- [Ralts: Robust Aggregation for Enhancing Graph Neural Network Resilience on Bit-flip Errors](https://mlsanity.com/paper/2507.18804/) (2025)
- [Modeling Relational Logic Circuits for And-Inverter Graph Convolutional Network](https://mlsanity.com/paper/2508.11991/) (2025)
- [Revisit Choice Network for Synthesis and Technology Mapping](https://mlsanity.com/paper/2508.14068/) (2025)
- [TRACE: Learning to Compute on Circuit Graphs](https://mlsanity.com/paper/2509.21886/) (2025)
- [ReVEAL: GNN-Guided Reverse Engineering for Formal Verification of Optimized Multipliers](https://mlsanity.com/paper/2512.22260/) (2025)
- [GauS: Differentiable Scheduling Optimization via Gaussian Reparameterization](https://mlsanity.com/paper/2602.20427/) (2026)
- [Graph Computation Meets Circuit Algebra: A Task-Aligned Analysis of Graph Neural Networks for Electronic Design Automation](https://mlsanity.com/paper/2605.08291/) (2026)
- [Beyond Flat Netlist: Hierarchical Graph Representation Learning for Scalable Analysis of Sequential Circuits](https://mlsanity.com/paper/2608.28188/) (2026)

## Abstract (arXiv)

Reasoning high-level abstractions from bit-blasted Boolean networks (BNs) such as gate-level netlists can significantly benefit functional verification, logic minimization, datapath synthesis, malicious logic identification, etc. Mostly, conventional reasoning approaches leverage structural hashing and functional propagation, suffering from limited scalability and inefficient usage of modern computing power. In response, we propose a novel symbolic reasoning framework exploiting graph neural networks (GNNs) and GPU acceleration to reason high-level functional blocks from gate-level netlists, namely Gamora, which offers high reasoning performance w.r.t exact reasoning algorithms, strong scalability to BNs with over 33 million nodes, and generalization capability from simple to complex designs. To further demonstrate the capability of Gamora, we also evaluate its reasoning performance after various technology mapping options, since technology-dependent optimizations are known to make functional reasoning much more challenging. Experimental results show that (1) Gamora reaches almost 100% and over 97% reasoning accuracy for carry-save-array (CSA) and Booth-encoded multipliers, respectively, with up to six orders of magnitude speedups compared to the state-of-the-art implementation in the ABC framework; (2) Gamora maintains high reasoning accuracy (>92%) in finding functional modules after complex technology mapping, upon which we comprehensively analyze the impacts on Gamora reasoning from technology mapping.