# Stream: Design Space Exploration of Layer-Fused DNNs on Heterogeneous Dataflow Accelerators

arXiv: https://arxiv.org/abs/2212.10612 · HTML: https://mlsanity.com/paper/2212.10612/

## Key facts

- Cited by 5 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 20 Dec 2022.

## Built on by (most cited first, 5 of 5)

- [eIQ Neutron: Redefining Edge-AI Inference with Integrated NPU and Compiler Innovations](https://mlsanity.com/paper/2509.14388/) (2025)
- [CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures](https://mlsanity.com/paper/2401.07671/) (2024)
- [STEMS: Spatial-Temporal Mapping For Spiking Neural Networks](https://mlsanity.com/paper/2502.03287/) (2025)
- [Hardware-Algorithm Co-Optimization of Early-Exit Neural Networks for Multi-Core Edge Accelerators](https://mlsanity.com/paper/2512.04705/) (2025)
- [MONET: Modeling and Optimization of neural NEtwork Training from Edge to Data Centers](https://mlsanity.com/paper/2603.15002/) (2026)

## Abstract (arXiv)

As the landscape of deep neural networks evolves, heterogeneous dataflow accelerators, in the form of multi-core architectures or chiplet-based designs, promise more flexibility and higher inference performance through scalability. So far, these systems exploit the increased parallelism by coarsely mapping a single layer at a time across cores, which incurs frequent costly off-chip memory accesses, or by pipelining batches of inputs, which falls short in meeting the demands of latency-critical applications. To alleviate these bottlenecks, this work explores a new fine-grain mapping paradigm, referred to as layer fusion, on heterogeneous dataflow accelerators through a novel design space exploration framework called Stream. Stream captures a wide variety of heterogeneous dataflow architectures and mapping granularities, and implements a memory and communication-aware latency and energy analysis validated with three distinct state-of-the-art hardware implementations. As such, it facilitates a holistic exploration of architecture and mapping, by strategically allocating the workload through constraint optimization. The findings demonstrate that the integration of layer fusion with heterogeneous dataflow accelerators yields up to 2.2x lower energy-delay product in inference efficiency, addressing both energy consumption and latency concerns. The framework is available open-source at: https://github.com/kuleuven-micas/stream.