# FPGA Implementation of Multi-Layer Machine Learning Equalizer with On-Chip Training

arXiv: https://arxiv.org/abs/2212.03515 · HTML: https://mlsanity.com/paper/2212.03515/

## Key facts

- Cited by 2 papers in the map (data through 14 Oct 2026).
- Builds on 6 of its 21 references that are in the map.
- First posted on arXiv 7 Dec 2022.

## Builds on (most cited first, 6 of 6)

- [From Learning to Meta-Learning: Reduced Training Overhead and Complexity for Communication Systems](https://mlsanity.com/paper/2001.01227/) (2020)
- [Nonlinear Interference Mitigation via Deep Neural Networks](https://mlsanity.com/paper/1710.06234/) (2017)
- [Physics-Based Deep Learning for Fiber-Optic Communication Systems](https://mlsanity.com/paper/2010.14258/) (2020)
- [Model-Based Machine Learning for Joint Digital Backpropagation and PMD Compensation](https://mlsanity.com/paper/2001.09277/) (2020)
- [Towards FPGA Implementation of Neural Network-Based Nonlinearity Mitigation Equalizers in Coherent Optical Transmission Systems](https://mlsanity.com/paper/2206.12180/) (2022)
- [ASIC Implementation of Time-Domain Digital Backpropagation with Deep-Learned Chromatic Dispersion Filters](https://mlsanity.com/paper/1806.07223/) (2018)

## Built on by (most cited first, 2 of 2)

- [Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation](https://mlsanity.com/paper/2304.06987/) (2023)
- [Ultrafast On-Chip Online Learning via Spline Locality in Kolmogorov-Arnold Networks](https://mlsanity.com/paper/2602.02056/) (2026)

## Abstract (arXiv)

We design and implement an adaptive machine learning equalizer that alternates multiple linear and nonlinear computational layers on an FPGA. On-chip training via gradient backpropagation is shown to allow for real-time adaptation to time-varying channel impairments.