# Hybrid Gate-Pulse Model for Variational Quantum Algorithms

arXiv: https://arxiv.org/abs/2212.00661 · HTML: https://mlsanity.com/paper/2212.00661/

## Key facts

- Cited by 6 papers in the map (data through 14 Oct 2026).
- First posted on arXiv 1 Dec 2022.

## Built on by (most cited first, 6 of 6)

- [Transformer-QEC: Quantum Error Correction Code Decoding with Transferable Transformers](https://mlsanity.com/paper/2311.16082/) (2023)
- [QuMoS: A Framework for Preserving Security of Quantum Machine Learning Model](https://mlsanity.com/paper/2304.11511/) (2023)
- [Unleashing the Expressive Power of Pulse-Based Quantum Neural Networks](https://mlsanity.com/paper/2402.02880/) (2024)
- [Review of Ansatz Designing Techniques for Variational Quantum Algorithms](https://mlsanity.com/paper/2212.04913/) (2022)
- [DGR: Tackling Drifted and Correlated Noise in Quantum Error Correction via Decoding Graph Re-weighting](https://mlsanity.com/paper/2311.16214/) (2023)
- [Connecting phases of matter to the flatness of the loss landscape in analog variational quantum algorithms](https://mlsanity.com/paper/2506.13865/) (2025)

## Abstract (arXiv)

Current quantum programs are mostly synthesized and compiled on the gate-level, where quantum circuits are composed of quantum gates. The gate-level workflow, however, introduces significant redundancy when quantum gates are eventually transformed into control signals and applied on quantum devices. For superconducting quantum computers, the control signals are microwave pulses. Therefore, pulse-level optimization has gained more attention from researchers due to their advantages in terms of circuit duration. Recent works, however, are limited by their poor scalability brought by the large parameter space of control signals. In addition, the lack of gate-level "knowledge" also affects the performance of pure pulse-level frameworks. We present a hybrid gate-pulse model that can mitigate these problems. We propose to use gate-level compilation and optimization for "fixed" part of the quantum circuits and to use pulse-level methods for problem-agnostic parts. Experimental results demonstrate the efficiency of the proposed framework in discrete optimization tasks. We achieve a performance boost at most 8% with 60% shorter pulse duration in the problem-agnostic layer.