# TAG: Learning Circuit Spatial Embedding From Layouts

arXiv: https://arxiv.org/abs/2209.03465 · HTML: https://mlsanity.com/paper/2209.03465/

## Key facts

- Cited by 9 papers in the map (data through 14 Oct 2026).
- Builds on 12 of its 29 references that are in the map.
- First posted on arXiv 7 Sep 2022.

## Builds on (most cited first, 12 of 12)

- [Attention Is All You Need](https://mlsanity.com/paper/1706.03762/) (2017)
- [BERT: Pre-training of Deep Bidirectional Transformers for Language Understanding](https://mlsanity.com/paper/1810.04805/) (2018)
- [How Powerful are Graph Neural Networks?](https://mlsanity.com/paper/1810.00826/) (2018)
- [Enriching Word Vectors with Subword Information](https://mlsanity.com/paper/1607.04606/) (2016)
- [Simplifying Graph Convolutional Networks](https://mlsanity.com/paper/1902.07153/) (2019)
- [code2vec: Learning Distributed Representations of Code](https://mlsanity.com/paper/1803.09473/) (2018)
- [Advances in Pre-Training Distributed Word Representations](https://mlsanity.com/paper/1712.09405/) (2017)
- [GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning](https://mlsanity.com/paper/2005.00406/) (2020)
- [AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs](https://mlsanity.com/paper/2001.01808/) (2020)
- [DeepGate: Learning Neural Representations of Logic Gates](https://mlsanity.com/paper/2111.14616/) (2021)
- [High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing](https://mlsanity.com/paper/2201.06848/) (2022)
- [A general approach for identifying hierarchical symmetry constraints for analog circuit layout](https://mlsanity.com/paper/2010.00051/) (2020)

## Built on by (most cited first, 9 of 9)

- [DeepGate2: Functionality-Aware Circuit Representation Learning](https://mlsanity.com/paper/2305.16373/) (2023)
- [NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph](https://mlsanity.com/paper/2504.09260/) (2025)
- [Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits](https://mlsanity.com/paper/2312.14405/) (2023)
- [Emerging ML-AI Techniques for Analog and RF EDA](https://mlsanity.com/paper/2506.00007/) (2025)
- [RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Prediction](https://mlsanity.com/paper/2508.16403/) (2025)
- [Learning Representations Through Contrastive Neural Model Checking](https://mlsanity.com/paper/2510.01853/) (2025)
- [KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits](https://mlsanity.com/paper/2603.24101/) (2026)
- [FusionCell: Cross-Attentive Fusion of Layout Geometry and Netlist Topology for Standard-Cell Performance Prediction](https://mlsanity.com/paper/2605.20287/) (2026)
- [ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuits](https://mlsanity.com/paper/2607.23225/) (2026)

## Abstract (arXiv)

Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new paradigm of learning the circuit representation from layouts leveraging text, self-attention and graph. The embedding network model learns spatial information without manual labeling. We introduce text embedding and a self-attention mechanism to AMS circuit learning. Experimental results demonstrate the ability to predict layout distances between instances with industrial FinFET technology benchmarks. The effectiveness of the circuit representation is verified by showing the transferability to three other learning tasks with limited data in the case studies: layout matching prediction, wirelength estimation, and net parasitic capacitance prediction.